US4596977A
Expired / Lapsed
US
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Dual slope analog to digital converter with out-of-range reset
Assignee: Honeywell Inc
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Filing: 1984-12-03
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Granted: 1986-06-24
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Expires: 2004-12-03
Abstract
Abstract A control method and apparatus for dual slope analog to digital signal conversion is disclosed in which the time required for input signal integration is sensed. A switch connected across the integrator is closed in response to sensing of an integration time which exceeds the integration interval corresponding to a limit of the expected range of input signal values.
Inventors
- 👤 Mitchell A. Bauman
- 👤 David C. Ullestad
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 16:13
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/10; H03M1/1071; H03M1/1095; H03M1/12; H03M1/50; H03M1/52
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
253 words
Dual slope analog to digital conversion apparatus comprising: an integrator circuit including an input terminal for receiving a signal to be integrated, an output terminal, and a capacitor whose charge is changed in one sense when the value of the input signal exceeds a reference signal and whose charge is changed in the opposite sense when the value of the input signal is less than the reference signal; signal input means for sequentially supplying a signal of unknown value and a signal of known value to the input terminal of said integrator circuit, the signal of unknown value being supplied for a predetermined interval of time whereby the output signal of said integrator circuit starts at a first predetermined value and changes to a second undetermined value, the signal of known value being supplied for the time interval required for the output signal to return to the first predetermined value, the time interval required for the integration process being proportional to the value of the unknown signal; a time interval detector connected to said integrator circuit, said detector being operable to produce a control signal after the integration process has continued for a predetermined interval indicative of a limiting expected value of the signal of unknown value; and a switch connected across the capacitor in said integrator circuit and controlled by said time interval detector, said switch being operable to close upon receipt of the control signal to thereby reset said integrator circuit to produce an output signal of the first predetermined value.
Claim 2
Dependent Claim
253 words
Dual slope analog to digital conversion apparatus comprising: an integrator circuit including an input terminal for receiving a signal to be integrated, an output terminal, and a capacitor whose charge is changed in one sense when the value of the input signal exceeds a reference signal and whose charge is changed in the opposite sense when the value of the input signal is less than the reference signal; signal input means for sequentially supplying a signal of unknown value and a signal of known value to the input terminal of said integrator circuit, the signal of unknown value being supplied for a predetermined interval of time whereby the output signal of said integrator circuit starts at a first predetermined value and changes to a second undetermined value, the signal of known value being supplied for the time interval required for the output signal to return to the first predetermined value, the time interval required for the integration process being proportional to the value of the unknown signal; a time interval detector connected to said integrator circuit, said detector being operable to produce a control signal after the integration process has continued for a predetermined interval indicative of a limiting expected value of the signal of unknown value; and a switch connected across the capacitor in said integrator circuit and controlled by said time interval detector, said switch being operable to close upon receipt of the control signal to thereby reset said integrator circuit to produce an output signal of the first predetermined value.
Claim 3
Dependent Claim
47 words
The conversion apparatus of claim 1 wherein said time interval detector includes: a clock pulse source; and counter means for counting the clock pulses which occur during the integration process, and supplying the control signal to said switch when a predetermined number of clock pulses is reached.
Claim 4
Independent Claim
167 words
A method of controlling a dual slope analog to digital converter comprising the steps of: integrating an analog input signal of unknown magnitude for a known interval of time to produce a ramp output signal which changes from a first predetermined value to a second unknown value at a rate depending on the value of the analog input signal relative to a predetermined reference; integrating a signal of known value to produce a ramp output signal having as a starting value the final value of the ramp output signal produced by integrating the input signal of unknown magnitude, said integration continuing until the ramp output signal returns to the first predetermined value; sensing the time during which the integration process is continuing; determining an integration time interval corresponding to a limit of the expected range of the input signal of unknown magnitude; and returning the integrator to its initial condition if the actual integration time exceeds the time interval corresponding to the limit of the expected range.
Claim 5
Independent Claim
167 words
A method of controlling a dual slope analog to digital converter comprising the steps of: integrating an analog input signal of unknown magnitude for a known interval of time to produce a ramp output signal which changes from a first predetermined value to a second unknown value at a rate depending on the value of the analog input signal relative to a predetermined reference; integrating a signal of known value to produce a ramp output signal having as a starting value the final value of the ramp output signal produced by integrating the input signal of unknown magnitude, said integration continuing until the ramp output signal returns to the first predetermined value; sensing the time during which the integration process is continuing; determining an integration time interval corresponding to a limit of the expected range of the input signal of unknown magnitude; and returning the integrator to its initial condition if the actual integration time exceeds the time interval corresponding to the limit of the expected range.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-06-23 | 1989-12-23 | 1990-06-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-06-23 | 1993-12-23 | 1994-06-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-06-23 | 1997-12-23 | 1998-06-24 | $7700.00 | Window Closed / Lapsed |