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Etching a layer over a semiconductor

Assignee: HP Inc
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Filing: 1985-06-13
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Granted: 1986-06-24
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Expires: 2005-06-13
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Abstract

Abstract A new phenomenon in integrated circuit etch processing is presented, explained and utilized to permit better removal of layers overlying integrated circuit structures, and if desired, the formation of conductive layers on such structures by a less complicated and lower temperature process than has been possible by conventional techniques.

Inventors

  • 👤 David E. Hackleman
  • 👤 Ralph H. Nielsen, Jr.
  • 👤 Marzio A. Leban

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 05:58
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 78 words
In a method for chemical etching with an etching fluid an insulating layer over a surface of a semiconductor substrate, the steps comprising: submerging the semiconductor substrate in the etchng fluid; and applying a positive voltage with respect to the surface of the semiconductor substrate and the etching fluid to create an electric field across the insulating layer, so that reduced species of the insulating layer created during chemical etching are oxidized as the reduced species are created.
Claim 2
Dependent Claim 78 words
In a method for chemical etching with an etching fluid an insulating layer over a surface of a semiconductor substrate, the steps comprising: submerging the semiconductor substrate in the etchng fluid; and applying a positive voltage with respect to the surface of the semiconductor substrate and the etching fluid to create an electric field across the insulating layer, so that reduced species of the insulating layer created during chemical etching are oxidized as the reduced species are created.
Claim 3
Dependent Claim 20 words
In a method as in claim 1 wherein the electric field created is between 10 5 and 10 7 volts/cm.
Claim 4
Dependent Claim 30 words
In a method as in claim 1 wherein the insulating layer prior to etching is composed substantially of silicon dioxide and wherein the semiconductor substrate is composed substantially of silicon.

References Cited (Backward Citations)

US3438873A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-06-23 1989-12-23 1990-06-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-06-23 1993-12-23 1994-06-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-06-23 1997-12-23 1998-06-24 $7700.00 Window Closed / Lapsed

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