Recovery of carrier and clock frequencies in a phase or amplitude state modulation and coherent demodulation digital transmission system

Claim 2

An arrangement for recovering carrier and clock frequencies in a digital transmission system comprising: in a transmitting part, means for multiplying a frequency 1/T of a clock signal provided with a binary signal by a predetermined ratio n into a carrier wave frequency P, and means receiving said binary signal, clock signal and carrier wave for modulating in phase of amplitude said carrier wave by said binary signal into a modulation signal having I=2 J possible phase or amplitude states corresponding to combinations of J consecutive bits in said modulating binary signal, said modulation signal having a modulation frequency 1/τ equal to 1/JT, and in a receiving part, means for delaying said modulation signal by a time equal to half the modulation period τ to provide a delayed modulation signal, means for summing said modulation signal and said delayed modulation signal into a summation signal, means for full-wave rectifying said summation signal into a rectified signal, phase locked means receiving said rectified signal for recovering said carrier wave frequency and clock signal frequency, and means receiving said recovered carrier wave and clock signal for phase or amplitude demodulating said modulation signal into said binary signal.

Claim 3

The arrangement claimed in claim 1, wherein said delay means includes an all-pass filter with two operational amplifiers.

Claim 4

The arrangement claimed in claim 1 wherein said summing means and said rectifying means include an operational amplifier operating as an adder or subtractor and having two diode feedback paths for full-wave rectification, and an operational amplifier having two imputs connected respectively to said diodes and operating as a substractor.

Claim 5

The arrangement claimed in claim 1, wherein said phase locked means comprises means for sampling said rectified signal, means for differentially processing sample signals derived by said sampling means, means for low pass filtering a differential signal outputting from said differentially processing means, a voltage controlled oscillator controlled by a filtered signal outputting from said low pass filtering means, said oscillator oscillating at a frequency multiple of said modulation frequency, and a time base connected to an output of said oscillator for deriving sampling control signals to control said sampling means and recovered carrier wave frequency signals and recovered clock signals to be supplied into said demodulating means.

Claim 6

The arrangement claimed in claim 1 wherein said phase locked means comprises means for sampling and band pass filtering said rectified signal into a logic signal having said modulation frequency, phase comparing means having a first input receiving said logic signal, band pass filtering means connected to an output of said phase comparing means, a voltage controlled oscillator connected to an output of said band pass filtering means and oscillating at a frequency multiple of said modulation frequency, and a time base connected to an output of said oscillator for deriving sampling control signals to control said sampling means, a signal having said modulation frequency to be fed to a second input of said phase comparing means, and recovered carrier wave frequency signals and recovered clock signals to be supplied into said demodulating means.

Claim 7

The arrangement claimed in claim 5 wherein said sampling and band pass filtering means comprises a switched-capacitor band pass filter receiving said rectified signal and controlled by said sampling control signals, a band pass filter connected to an output of said switched-capacitor band pass filter, and a Schmitt flip-flop connected to an output of said band pass filter.

Claim 8

An arrangement for recovering carrier and clock frequencies in a digital transmission system comprising: in a transmitting part, means for multiplying a frequency 1/T of a clock signal provided with a binary signal by a predetermined ratio n into a carrier wave frequency P, and means receiving said binary signal, clock signal and carrier wave for modulating in phase of amplitude said carrier wave by said binary signal into a modulation signal having I=2 J possible phase or amplitude states corresponding to combinations of J consecutive bits in said modulating binary signal, said modulation signal having a modulation frequency 1/τ equal to 1/JT, and in a receiving part, means for delaying said modulation signal by a time equal to half the modulation period τ to provide a delayed modulation signal, means for summing said modulation signal and said delayed modulation signal into a summation signal, means for full-wave rectifying said summation signal into a rectified signal, a local oscillator oscillating at a frequency multiple of said modulation frequency, frequency dividing means connected to an output of said oscillator for deriving sampling control signals, means controlled by said sampling control signals for sampling and band pass filtering said rectified signal into a sampled signal, means for low pass filtering said sampled signal into a recovered carrier wave, a time base receiving said recovered carrier wave for deriving for recovering carrier wave frequency signals and recovered clock signals, and means receiving said recovered carrier and clock signals for demodulating said modulation signal into said binary signal.

Claim 9

An arrangement for recovering carrier and clock frequencies in a digital transmission system comprising: in a transmitting part, means for multiplying a frequency 1/T of a clock signal provided with a binary signal by a predetermined ratio n into a carrier wave frequency P, and means receiving said binary signal, clock signal and carrier wave for modulating in phase of amplitude said carrier wave by said binary signal into a modulation signal having I=2 J possible phase or amplitude states corresponding to combinations of J consecutive bits in said modulating binary signal, said modulation signal having a modulation frequency 1/τ equal to 1/JT, and in a receiving part, means for delaying said modulation signal by a time equal to half the modulation period τ to provide a delayed modulation signal, means for summing said modulation signal and said delayed modulation signal into a summation signal, means for full-wave rectifying said summation signal into a rectified signal, a local oscillator oscillating at a frequency multiple of said modulation frequency, frequency dividing means connected to an output of said oscillator for deriving sampling control signals, means controlled by said sampling control signals for sampling and band pass filtering said rectified signal into a sampled signal, means for low pass filtering said sampled signal into a recovered carrier wave, a time base receiving said recovered carrier wave for deriving for recovering carrier wave frequency signals and recovered clock signals, and means receiving said recovered carrier and clock signals for demodulating said modulation signal into said binary signal.

Claim 10

The arrangement claimed in claim 7 wherein said sampling and band pass filtering means comprises a switched-capacitor band pass filter receiving said rectified signal and controlled by said sampling control signals, a band pass filter connected to an output of said switched capacitor band pass filter, and a Schmitt flip-flop connected to an output of said band pass filter.

Claim 11

An arrangement for recovering carrier and clock frequencies in a digital transmission system comprising: in a transmitting part, means for multiplying a frequency 1/T of a clock signal provided with a binary signal by a predetermined ratio n into a carrier wave frequency P, and means receiving said binary signal, clock signal and carrier wave for modulating in phase or amplitude said carrier wave by said binary signal into a modulation signal having I=2 J possible phase or amplitude states corresponding to combinations of J consecutive bits in said modulating binary signal, said modulating signal having a modulation frequency 1/τ equal to 1/JT, and in a receiving part, means for delaying said modulation signal by a time equal to half the modulation period τ to provide a delayed modulation signal, means for summing said modulation signal and said delayed modulation signal into a summation signal, means for full-wave rectifying said summation signal into a rectified signal, means for band pass filtering said rectified signal into a recovered carrier wave, means for multiplying in frequency by I said modulation signal into a IP-frequency signal, means for band pass filtering said IP-frequency signal into a filtered IP-frequency signal, a time base set in phase by said recovered carrier wave for deriving, as a function of said filtered IP-frequency signal, recovered carrier wave frequency signals and for recovering clock signals, and means receiving said recovered carrier and clock signals for demodulating said modulation signal into said binary signal.

Claim 12

An arrangement for recovering carrier and clock frequencies in a digital transmission system comprising: in a transmitting part, means for multiplying a frequency 1/T of a clock signal provided with a binary signal by a predetermined ratio n into a carrier wave frequency P, and means receiving said binary signal, clock signal and carrier wave for modulating in phase or amplitude said carrier wave by said binary signal into a modulation signal having I=2 J possible phase or amplitude states corresponding to combinations of J consecutive bits in said modulating binary signal, said modulating signal having a modulation frequency 1/τ equal to 1/JT, and in a receiving part, means for delaying said modulation signal by a time equal to half the modulation period τ to provide a delayed modulation signal, means for summing said modulation signal and said delayed modulation signal into a summation signal, means for full-wave rectifying said summation signal into a rectified signal, means for band pass filtering said rectified signal into a recovered carrier wave, means for multiplying in frequency by I said modulation signal into a IP-frequency signal, means for band pass filtering said IP-frequency signal into a filtered IP-frequency signal, a time base set in phase by said recovered carrier wave for deriving, as a function of said filtered IP-frequency signal, recovered carrier wave frequency signals and for recovering clock signals, and means receiving said recovered carrier and clock signals for demodulating said modulation signal into said binary signal.