Memory-programmable controller

Claim 1

In a memory-programmable controller of the type having a cyclically traversed user control program for controlling a peripheral process, including a word processor for processing operating system and word commands, a word processor bus coupled to the word processor, a bit processor for processing binary interlinking commands, a user program memory wherein the control program including the word and interlinking commands is stored, an operating system memory wherein an operating system program including the operating system commands is stored and a data memory wherein binary process images of the process are stored, the improvement comprising the bit processor being coupled to the word processor bus and including: means for executing a first binary interlinking command from the user program memory; first bus means; means coupled to said first bus means for fetching from the user program memory a next binary interlinking or word command via said first bus means; second bus means; data processing means coupled to said second bus means and to said means for executing; said second bus means allowing said data processing means to access data from said data memory when said first command is being executed; and means coupled to said means for fetching for assembling said next command and for transferring the next command to said means for executing if said next command is a binary interlinking command, thereby allowing said means for executing to process data from said data memory in accordance with said next command immediately after the first command is executed.