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Patent US4591845A successfully refreshed from Google Patents.
US4591845A
Expired / Lapsed
US
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Character and graphic signal generating apparatus
Assignee: Hitachi Ltd
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Filing: 1983-09-22
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Granted: 1986-05-27
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Expires: 2003-09-22
Abstract
Abstract A character and graphic signal generating apparatus of the type suitable for use with a personal computer for displaying characters and graphic patterns in a superposed relation according to a raster scan method comprises a frame buffer for storing coded character data, a DMA control unit for controlling DMA transfer of coded character data from a display RAM to the frame buffer in a non-display cycle, and units for reading out the data from the display RAM and the frame buffer in parallel relation in a display cycle so as to simultaneously derive the graphic data and the coded character data in each display cycle, whereby more display data can be read out in a unit time, and high-density display can be achieved without the sacrifice of the scanning speed.
Inventors
- 👤 Shigeru Komatsu
- 👤 Shigeru Hirahata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 16:37
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/40
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
156 words
A signal generating apparatus for displaying character and graphic data comprising: display memory means for storing coded character and graphic data corresponding to at least one display frame; frame buffer means for storing coded character data corresponding to one display frame of said character and graphic data; means for DMA transferring said coded character data from said display memory means to said frame buffer means in a non-display period; graphic data fetching means for fetching graphic data in said character and graphic data from said display memory means in a display period; coded data decoding means for fetching said coded character data from said frame buffer means and for decoding the same into pattern data in a display period; and composite video signal generating means for combining the output signals from said graphic data fetching means and said coded data decoding means and for generating a composite video signal for displaying said character and graphic data.
Claim 2
Dependent Claim
156 words
A signal generating apparatus for displaying character and graphic data comprising: display memory means for storing coded character and graphic data corresponding to at least one display frame; frame buffer means for storing coded character data corresponding to one display frame of said character and graphic data; means for DMA transferring said coded character data from said display memory means to said frame buffer means in a non-display period; graphic data fetching means for fetching graphic data in said character and graphic data from said display memory means in a display period; coded data decoding means for fetching said coded character data from said frame buffer means and for decoding the same into pattern data in a display period; and composite video signal generating means for combining the output signals from said graphic data fetching means and said coded data decoding means and for generating a composite video signal for displaying said character and graphic data.
Claim 3
Dependent Claim
270 words
A signal generating apparatus for displaying character and graphic data comprising: display address generating means for generating a display address signal; display memory means having an address input terminal and a data input termial for storing character and graphic data corresponding to a plurality of display frames; buffer memory means having an address input terminal and a data input termnal for storing coded character data corresponding to one frame of said character and graphic data; means generating a DMA address signal for DMA transferring one frame of coded character data from said display memory means to said buffer memory means in a non-display period; switching means for cyclically switching over between said DMA address signal and said display address signal; means for applying the output signal of said switching means to said address input terminal of said display memory means and to said address input terminal of said buffer memory means; means for applying an output signal of said display memory means read out in response to said DMA address signal to said data input terminal of said buffer memory means in a non-display period; graphic data buffer means for holding said output signal of said dispay memory means read out in response to said display address signal; coded data decoding means for decoding the output signal of said buffer memory means read out in response to said display address signal into pattern data; and composite video signal generating means for combining said output signals from said graphic fetching means and said coded data decoding means and for generating a composite video signal for displaying said character and graphic data.
Claim 4
Dependent Claim
270 words
A signal generating apparatus for displaying character and graphic data comprising: display address generating means for generating a display address signal; display memory means having an address input terminal and a data input termial for storing character and graphic data corresponding to a plurality of display frames; buffer memory means having an address input terminal and a data input termnal for storing coded character data corresponding to one frame of said character and graphic data; means generating a DMA address signal for DMA transferring one frame of coded character data from said display memory means to said buffer memory means in a non-display period; switching means for cyclically switching over between said DMA address signal and said display address signal; means for applying the output signal of said switching means to said address input terminal of said display memory means and to said address input terminal of said buffer memory means; means for applying an output signal of said display memory means read out in response to said DMA address signal to said data input terminal of said buffer memory means in a non-display period; graphic data buffer means for holding said output signal of said dispay memory means read out in response to said display address signal; coded data decoding means for decoding the output signal of said buffer memory means read out in response to said display address signal into pattern data; and composite video signal generating means for combining said output signals from said graphic fetching means and said coded data decoding means and for generating a composite video signal for displaying said character and graphic data.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-05-26 | 1989-11-25 | 1990-05-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-05-26 | 1993-11-25 | 1994-05-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-05-26 | 1997-11-25 | 1998-05-27 | $7700.00 | Window Closed / Lapsed |