US4587138A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOS rear end processing
Assignee: Intel Corp
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Filing: 1984-11-09
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Granted: 1986-05-06
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Expires: 2004-11-09
Abstract
Abstract A process for the reduction of defect formation in conductive layers of semiconductor bodies during patterning, alloying and passivation. A film of low temperature spin-on-glass containing dye is formed on the conductive layer prior to patterning and any high temperature process greater than 200 degrees C. Hermetic passivation is achieved by depositing on the conductive layer a composite film consisting of a lower, tensile layer and an upper, compressive layer with the net force of the passivation film being tensile.
Inventors
- 👤 Leopoldo D. Yau
- 👤 Robert A. Gasser, Jr.
- 👤 Kenneth R. Week, Jr.
- 👤 Jick M. Yu
- 👤 David D. Chin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:22
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10P76/2043; H10W; H10W74/00; H10W74/10; H10W74/131; H10W74/137; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; Y; Y10; Y10S; Y10S438/00; Y10S438/937; Y10S438/958
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
93 words
A process for forming a patterned, alloyed conductive layer on a semiconductor body comprising the steps of: a. depositing a metallic conductive layer over said semiconductor body; b. depositing a layer of low temperature spin-on-glass on said conductive layer; said spin-on-glass containing dye; and, c. any patterning of said conductive layer and heating cycle greater than 200 degrees C. done after said depositing of said low temperature spin on glass, whereby the formation of hillocks and voids in said conductive layer is inhibited, and said spin-on-glass acts as an antireflective coating during patterning.
Claim 2
Dependent Claim
93 words
A process for forming a patterned, alloyed conductive layer on a semiconductor body comprising the steps of: a. depositing a metallic conductive layer over said semiconductor body; b. depositing a layer of low temperature spin-on-glass on said conductive layer; said spin-on-glass containing dye; and, c. any patterning of said conductive layer and heating cycle greater than 200 degrees C. done after said depositing of said low temperature spin on glass, whereby the formation of hillocks and voids in said conductive layer is inhibited, and said spin-on-glass acts as an antireflective coating during patterning.
Claim 3
Dependent Claim
12 words
The process defined by claim 1 wherein said conductive layer is aluminum.
Claim 4
Dependent Claim
18 words
The process defined by claim 1 wherein said layer of spin on glass is approximately 800-5000 A thick.
Claim 5
Dependent Claim
66 words
A process for forming a patterned, alloyed conductive layer on a silicon substrate comprising the steps of: depositing a metallic conductive layer over said silicon substrate; forming a layer of spin-on glass on said conductive layer, said spin-on glass layer containing dye; patterning said conductive layer utilizing photolithographic techniques; heating said silicon substrate to a temperature sufficient to alloy said conductive layer and said silicon substrate.
Claim 6
Dependent Claim
66 words
A process for forming a patterned, alloyed conductive layer on a silicon substrate comprising the steps of: depositing a metallic conductive layer over said silicon substrate; forming a layer of spin-on glass on said conductive layer, said spin-on glass layer containing dye; patterning said conductive layer utilizing photolithographic techniques; heating said silicon substrate to a temperature sufficient to alloy said conductive layer and said silicon substrate.
Claim 7
Dependent Claim
13 words
The process as defined by claim 4 wherein said conductive layer is aluminum.
Claim 8
Dependent Claim
20 words
The process as defined by claim 5 wherein said layer of spin-on glass is approximately 800 to 5000 A thick.
Claim 9
Dependent Claim
19 words
The process as defined by claim 6 wherein said silicon substrate is heated to at least approximately 200° centigrade.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-05-05 | 1989-11-04 | 1990-05-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-05-05 | 1993-11-04 | 1994-05-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-05-05 | 1997-11-04 | 1998-05-06 | $7700.00 | Window Closed / Lapsed |