US4585954A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Substrate bias generator for dynamic RAM having variable pump current level
Assignee: Texas Instruments Inc
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Filing: 1983-07-08
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Granted: 1986-04-29
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Expires: 2003-07-08
Abstract
Abstract A dynamic MOS read/write memory has a substrate bias generator circuit which includes, in this example, four separate pump circuits. A first of these operates only during power-up to quickly produce the desired back bias; this pump circuit uses a high frequency oscillator and a low impedence drive, and cuts off to save power as soon as the necessary bias is reached. A second generates a smaller sustaining current, using a lower frequency oscillator and higher impedance drive; this functions to compensate for leakage during idle periods. The third and fourth pump circuits are driven by RAS and CAS, so these occur only when needed, and at a rate dependent upon the actual operating condition of the memory.
Inventors
- 👤 Masashi Hashimoto
- 👤 Chitranjan Reddy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 12:01
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/205
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
99 words
A substrate bias pumping circuit for a dynamic MOS read/write memory or the like constructed on a semiconductor substrate, comprising: (a) a first pump circuit having a first oscillator and a first output to the substrate, the first oscillator operating at a first frequency, (b) a second pump circuit having a second oscillator and a second output to the substrate, the second oscillator operating at a second frequency substantially lower than said first frequency, (c) a third pump circuit having a third output to the substrate and operating in response to a variable frequency clock input to the memory.
Claim 2
Dependent Claim
99 words
A substrate bias pumping circuit for a dynamic MOS read/write memory or the like constructed on a semiconductor substrate, comprising: (a) a first pump circuit having a first oscillator and a first output to the substrate, the first oscillator operating at a first frequency, (b) a second pump circuit having a second oscillator and a second output to the substrate, the second oscillator operating at a second frequency substantially lower than said first frequency, (c) a third pump circuit having a third output to the substrate and operating in response to a variable frequency clock input to the memory.
Claim 3
Dependent Claim
34 words
A circuit according to claim 1 wherein said first pump circuit includes means for detecting the substrate bias and turning off said first oscillator and first output when such bias reaches a selected level.
Claim 4
Dependent Claim
21 words
A circuit according to claim 2 wherein said first output is at a much higher current level than said second output.
Claim 5
Dependent Claim
30 words
A circuit according to claim 3 wherein said first pump circuit includes switching means to turn off all power dissipation when said first oscillator and first output are turned off.
Claim 6
Dependent Claim
24 words
A circuit according to claim 4 wherein said first pump circuit operates only at the time of initial application of power to the circuit.
Claim 7
Dependent Claim
15 words
A circuit according to claim 1 wherein said variable clock is row address strobe (RAS).
Claim 8
Dependent Claim
73 words
A substrate bias generator for a semiconductor device comprising: oscillator means having outputs coupled to first pump circuit means, means responsive to the substrate bias to control said oscillator means when the substrate bias exceeds a selected level, to reduce the output of said pump circuit means to a lower standby level, a second pump circuit and means to activate said second pump circuit when an external clock is applied to said device.
Claim 9
Dependent Claim
73 words
A substrate bias generator for a semiconductor device comprising: oscillator means having outputs coupled to first pump circuit means, means responsive to the substrate bias to control said oscillator means when the substrate bias exceeds a selected level, to reduce the output of said pump circuit means to a lower standby level, a second pump circuit and means to activate said second pump circuit when an external clock is applied to said device.
Claim 10
Dependent Claim
111 words
A substrate bias generator for a semiconductor device, the device comprising: an oscillator having outputs coupled to a first pump circuit, means responsive to the substrate bias to turn off said oscillator when the substrate bias exceeds a selected level, a second pump circuit and means to activate said second pump circuit when an external clock is applied to said device, wherein said oscillator has a plurality of driver stages to drive said first pump circuit, and each driver stage has a series transistor coupled to enable said driver stage, and said means responsive to the substrate bias turns off said series transistor when the substrate bias exceeds said selected level.
Claim 11
Dependent Claim
111 words
A substrate bias generator for a semiconductor device, the device comprising: an oscillator having outputs coupled to a first pump circuit, means responsive to the substrate bias to turn off said oscillator when the substrate bias exceeds a selected level, a second pump circuit and means to activate said second pump circuit when an external clock is applied to said device, wherein said oscillator has a plurality of driver stages to drive said first pump circuit, and each driver stage has a series transistor coupled to enable said driver stage, and said means responsive to the substrate bias turns off said series transistor when the substrate bias exceeds said selected level.
Claim 12
Dependent Claim
28 words
A device according to claim 7 wherein a voltage supply to said oscillator means is turned on or turned off by said means responsive to the substrate bias.
Claim 13
Dependent Claim
20 words
A device according to claim 7 wherein said second pump circuit is activated by a row address strobe (RAS) clock.
Claim 14
Dependent Claim
23 words
A device according to claim 10 including a third pump circuit activated by a columm address strobe (CAS) clock applied to said device.
References Cited (Backward Citations)
US4409496A
Cited
US4388537A
Cited
US4460835A
Cited
US4322675A
Cited
US4471290A
Cited
US4455628A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-04-28 | 1989-10-28 | 1990-04-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-04-28 | 1993-10-28 | 1994-04-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-04-28 | 1997-10-28 | 1998-04-29 | $7700.00 | Window Closed / Lapsed |