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US4584605A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital hysteresis for video measurement and processing system

Assignee: GTE Communication Systems Corp
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Filing: 1983-11-02
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Granted: 1986-04-22
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Expires: 2003-11-02
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Abstract

Abstract In a signal measurement or processing system, specifically in a system which contemplates measurement or processing of video information and which is particularly adapted for use with microprocessors or microcomputers characterized by modest memory capacity and computational capability, a digital hysteresis circuit that enhances the quantization of an analog video signal. The hysteresis circuit is part of a transition detector that quantizes the brightness component of a composite video signal level into mutually exclusive and exhaustive BLACK and WHITE levels determined with regard to a THRESHOLD level. The THRESHOLD is established by applying a REFERENCE voltage, derived from the peak amplitude of the video signal, to a reference input of a D/A. The THRESHOLD is then established as a predetermined percentage of the REFERENCE voltage, as determined by a multibit digital CONTROL signal applied to the CONTROL input of the D/A. Digital hysteresis is effected by adding or subtracting appropriate digital bits from the primary digital control signal subsequent to WHITE-TO-BLACK and BLACK-TO-WHITE transistions, respectively, in the video signal. In a specific embodiment the circuit includes a digital substractor and adder to form the desired resultant digital control signals and a multiplexer to couple the resultant to the CONTROL input of the D/A.

Inventors

  • 👤 John A. Odozynski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 00:02
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/40; H04N1/403; G; G01; G01B; G01B11/00; G01B11/02; G01B11/022

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 150 words
In a signal processing system including circuitry for developing a REFERENCE voltage derived from an input signal, a D/A converter having the REFERENCE signal applied to a REFERENCE input and a multibit digital CONTROL signal applied to a CONTROL input so as to develop a THRESHOLD signal at an output, said THRESHOLD signal equivalent to a predetermined fraction of the REFERENCE signal as determined by the CONTROL signal, and a comparator sensitive to the relative amplitudes of the input signal and the THRESHOLD signal: A digital hysteresis circuit coupled to an output of the comparator for at least momentarily varying the THRESHOLD signal in response to transitions in the input signal, a transition herein regarded as a point at which the input signal becomes either greater than the then existing THRESHOLD signal, that is, a (B/W) transition, or less than the then existing THRESHOLD signal, that is, a (W/B) transition.
Claim 2
Dependent Claim 150 words
In a signal processing system including circuitry for developing a REFERENCE voltage derived from an input signal, a D/A converter having the REFERENCE signal applied to a REFERENCE input and a multibit digital CONTROL signal applied to a CONTROL input so as to develop a THRESHOLD signal at an output, said THRESHOLD signal equivalent to a predetermined fraction of the REFERENCE signal as determined by the CONTROL signal, and a comparator sensitive to the relative amplitudes of the input signal and the THRESHOLD signal: A digital hysteresis circuit coupled to an output of the comparator for at least momentarily varying the THRESHOLD signal in response to transitions in the input signal, a transition herein regarded as a point at which the input signal becomes either greater than the then existing THRESHOLD signal, that is, a (B/W) transition, or less than the then existing THRESHOLD signal, that is, a (W/B) transition.
Claim 3
Dependent Claim 74 words
A digital hysteresis circuit as defined in claim 1 and comprising a first input for a primary digital control signal (A), a second input for a digital hystersis signal (B) and an output coupled to the CONTROL input of the D/A, the output generally assuming the value (A) but at least momentarily assuming the value (A+B) in response to (W/B) transitions and at least momentarily assuming the value (A-B) in response to (B/W) transitions.
Claim 4
Dependent Claim 83 words
A digital hysteresis circuit as defined in claim 2 comprising: means for digitally adding (A) and (B) to form (A+B), means for digitally subtracting (B) from (A) to form (A-B), and multiplexing means responsive to transitions in the input signal for providing at the output of the digital hysteresis circuit a digital CONTROL signal to the D/A, the CONTROL signal equal to (A+B) at least momentarily subsequent (W/B) transitions, equal to (A-B) at least momentarily subsequent (B/W) transitions, and equal to (A) otherwise.
Claim 5
Dependent Claim 214 words
In a signal processing system including circuitry for developing a REFERENCE voltage derived from an input signal, a D/A converter having the RFERENCE signal applied to a REFERENCE input, and a multibit digital CONTROL signal applied to a CONTROL input so as to develop a THRESHOLD signal at an output, said THRESHOLD signal equivalent to a predetermined fraction of the REFERENCE signal as determined by the CONTROL signal, and including a comparator sensitive to the relative amplitudes of the input signal and the THRESHOLD signal, a digital hysteresis circuit coupled to an output of the comparator for varying, at least for a momentary period, the THRESHOLD signal in response to transitions in the input signal, a transition herein regarded as a point at which the input signal becomes either greater than the then existing THRESHOLD signal, that is, a (B/W) transtion, or less than the then existing THRESHOLD signal, that is, a (W/B) transition, the digital hysteresis circuit comprising: a first input for a primary digital control signal (A), a second input for a digital hysteresis signal (B), and an output coupled to the CONTROL input of the D/A, the output generally assuming the value (A+B) in response to (W/B) transitions and at least momentarily assuming the value (A-B) in response to (B/W) transitions.
Claim 6
Dependent Claim 214 words
In a signal processing system including circuitry for developing a REFERENCE voltage derived from an input signal, a D/A converter having the RFERENCE signal applied to a REFERENCE input, and a multibit digital CONTROL signal applied to a CONTROL input so as to develop a THRESHOLD signal at an output, said THRESHOLD signal equivalent to a predetermined fraction of the REFERENCE signal as determined by the CONTROL signal, and including a comparator sensitive to the relative amplitudes of the input signal and the THRESHOLD signal, a digital hysteresis circuit coupled to an output of the comparator for varying, at least for a momentary period, the THRESHOLD signal in response to transitions in the input signal, a transition herein regarded as a point at which the input signal becomes either greater than the then existing THRESHOLD signal, that is, a (B/W) transtion, or less than the then existing THRESHOLD signal, that is, a (W/B) transition, the digital hysteresis circuit comprising: a first input for a primary digital control signal (A), a second input for a digital hysteresis signal (B), and an output coupled to the CONTROL input of the D/A, the output generally assuming the value (A+B) in response to (W/B) transitions and at least momentarily assuming the value (A-B) in response to (B/W) transitions.
Claim 7
Dependent Claim 44 words
A digital hysteresis circuit as defined in claim 4 and comprising a multiplexer responsive to transitions in the input signal so as to apply an appropriate digital CONTROL signal to the CONTROL input of the D/A, the CONTROL signal as specified in claim 4.
Claim 8
Dependent Claim 68 words
A digital hysteresis circuit as defined in claim 5 wherein the multiplexer has a terminal for the application of a signal operative to select a CONTROL signal assuming the value (A), a terminal for the application of a signal operative to select a CONTROL signal assuming the value (A+B), and a terminal for the application of a signal operative to select a CONTROL signal assuming the value (A-B).
Claim 9
Dependent Claim 52 words
A digital hysteresis cirucit as defined in claim 6 and comrising an edge detector for coupling to the comparator and for providing an edge detector signal at its output in response to transitions in the input signal, said edge detector signal of a form calculated to differentiate between (W/B) and (B/W) transitions.
Claim 10
Dependent Claim 46 words
A digital hysteresis circuit as defined in claim 7 and comprising a (W/B) ONE-SHOT coupled between the edge detector and the multiplexer for the developing a signal operative to select a CONTROL signal assuming the value (A+B) in response to (W/B) transitions in the input signal.
Claim 11
Dependent Claim 40 words
A digital hysteresis circuit as defined in claim 8 and comprising a logic gate coupled between the (W/B) ONE-SHOT and the multiplexer for developing a signal operative to select a CONTROL signal assuming the value (A) during a quiescent state.
Claim 12
Dependent Claim 45 words
A digital hysteresis circuit as defined in claim 7 and comprising a (B/W) ONE-SHOT coupled between the edge detector and the multiplexer for developing a signal operative to select a CONTROL signal assuming the value (A-B) in response to (B/W) transitions in the input signal.
Claim 13
Dependent Claim 40 words
A digital hysteresis circuit as defined in claim 10 and comprising a logic gate coupled between the (B/W) ONE-SHOT and the multiplexer for developing a signal operative to select a CONTROL signal assuming the value (A) during a quiescent state.
Claim 14
Dependent Claim 80 words
A digital hysteresis circuit as defined in claim 4 and comprising: a digital adder to add (A) and (B) to form (A+B), a digital subtractor to substract (B) from (A) to form (A-B), and a multiplexer having inputs coupled to the respective (A), (A+B) and (A-B) digital signals, said multiplexer responsive to transitions in the input signal so as to apply an appropriate digital CONTROL signal to CONTROL input of the D/A, the CONTROL signal as specified in claim 4.
Claim 15
Dependent Claim 68 words
A digital hysteresis circuit as defined in claim 12 wherein the multiplexer has a terminal for the application of a signal operative to select a CONTROL signal assuming the value (A), a terminal for the application of a signal operative to select a CONTROL signal assuming the value (A+B), and a terminal for the application of a signal operative to select a CONTROL signal assuming the value (A-B).
Claim 16
Dependent Claim 49 words
A digital hysteresis circuit as defined in claim 13 and comprising an edge detector for coupling to the comparator and providing a signal of its output in response to transtions in the input signal, said edge detector signal of a form calculated to differentiate betweeen (W/B) and (B/W) transitions.
Claim 17
Dependent Claim 45 words
A digital hysteresis circuit as defined in claim 14 and comprising a (W/B) ONE-SHOT coupled between the edge detector and the multiplexer for developing a signal operative to select a CONTROL signal assuming the value (A+B) in response to (W/B) transitions in the input signal.
Claim 18
Dependent Claim 40 words
A digital hysteresis circuit as defined in claim 15 and comprising a logic gate coupled between the (W/B) ONE-SHOT and the multiplexer for developing a signal operative to select a CONTROL signal assuming the value (A) during a quiescent state.
Claim 19
Dependent Claim 45 words
A digital hysteresis circuit as defined in claim 14 and comprising a (B/W) ONE-SHOT coupled between the edge detector and the multiplexer for developing a signal operative to select a CONTROL signal assuming the value (A-B) in response to (B/W) transitions in the input signal.
Claim 20
Dependent Claim 40 words
A digital hysteresis circuit as defined in claim 17 and comprising a logic gate coupled between the (B/W) ONE-SHOT and the multiplexer for developing a signal operative to select a CONTROL signal assuming the value (A) during a quiescent state.

References Cited (Backward Citations)

US4133008A Cited
US4329717A Cited
US4516042A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-04-21 1989-10-21 1990-04-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-04-21 1993-10-21 1994-04-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-04-21 1997-10-21 1998-04-22 $7700.00 Window Closed / Lapsed

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