Semiconductor switch having a disconnectible thyristor

Claim 1

A semiconductor switching arrangement, comprising: a thyristor including a first terminal for connection to a first potential; a second terminal and a control terminal for receiving an ignition voltage and a turn-off current; a first switching transistor including a first terminal connected to said second terminal of said thyristor, a second terminal for connection to a second potential and a gate receiving a turn-on voltage for a first interval; a second switching transistor for conducting the turn-off current, said second switching transistor including a first terminal connected to said control terminal, a second terminal connected to said second terminal of said first switching transistor, and a gate for receiving a turn-on voltage for a second interval; said second transistor operable to be turned off during the application of an ignition voltage pulse following the end of said second interval to ignite said thyristor when the same is poled in the forward conducting direction and re-route the thyristor load current as turn-off current at the beginning of said second interval; said first and second switching transistors each comprising a metal-insulator-semiconductor field effect transistor, and wherein said arrangment is further defined as comprising: a boudary surface; a mult-element first emitter of a first conductivity type, a first base of an opposite, second conductivity type adjacent said first emitter and including portions extending between said emitter elements to said boundary surface, a second base of the first conductivity type adjacent said first base, and a second emitter of said second conductivity type adjacent said second base, a first electrode carried on said second emitter, said multi-element first emitter comprising a first emitter element and second and third emitter elements flanking and spaced from said first emitter element, second and third electrodes respectively carried on said second and third emitter elements and electrically connected together thereby forming said second terminal of said first switching transistor, said gate of said first switching transistor carried insulated over adjacent edges of said first and second emitter elements and a first portion of said first base therebetween and thereby forming said first switching transistor, a fourth electrode carried on a portion of said first base and connected to said control terminal of said thyristor, said third emitter element including a zone of said second conductivity type at said boundary surface spaced from a second portion of said first base, and said gate of said second switching transistor carried insulated over and bridging the adjacent edges of said second portion of said first base, said zone and that portion of said third emitter element therebetween thereby forming said second switching transistor.