Driver circuits for emitter switch gate turn-off SCR devices

Claim 2

A driver circuit for a transistor driven power switch including a gate turn-off thyristor (GTO) in series with a bipolar emitter switching transistor, said driver circuit comprising: controllable switch means coupled between the base of the emitter switching transistor and the anode of the GTO, for biasing the emitter switching transistor into conduction and maintaining said emitter switching transistor in a conductive state when said controllable switch means is conducting; turn-on means coupled to the gate of said GTO and to the base of said controllable switch means for providing a pulse to said gate to turn said GTO on and to said base to turn on said controllable switch means when said power switch is on; bias means coupled across the base emitter terminals of said emitter switching transistor for biasing said emitter transistor out of conduction to turn said GTO off; and clamp means for clamping the gate of said GTO to a predetermined voltage sufficiently low to protect the emitter switching transistor when said emitter switching transistor is biased out of conduction and said GTO turns off.

Claim 3

The circuit of claim 1 wherein said means for biasing said emitter switching transistor out of conduction comprises a first MOSFET.

Claim 4

The circuit of claim 2 further comprising means coupled to said first MOSFET and to said controllable switch means for biasing said controllable switch means out of conduction when said emitter switching transistor is biased out of conduction.

Claim 5

The circuit of claim 3 wherein said means for biasing said controllable switch means out of conduction comprises a second MOSFET having its gate coupled to the gate of said first MOSFET and its drain electrode coupled to said controllable switch means.

Claim 6

The circuit of claim 1 wherein said controllable switch means comprises a semiconductor device having an insulated gate.

Claim 7

The circuit of claim 1 wherein said said controllable switch means comprises a bipolar transistor.

Claim 8

The circuit of claim 1 wherein said controllable switch means comprises an insulated gate transistor.

Claim 9

The circuit of claim 1 wherein said means for providing a gate pulse to said GTO comprises a controllable switch means coupling the anode of the GTO to the gate of said GTO.

Claim 10

The circuit of claim 1 wherein said clamp comprises means for storing gate turn-off energy and means for returning energy into the GTO gate.

Claim 11

The circuit of claim 9 wherein said means for storing gate turn-off energy and returning energy into the GTO gate comprises a diode and a capacitor coupled in, series between the gate of the GTO and the emitter of the emitter switching transistor, said diode poled to conduct when reverse gate current is flowing to charge said capacitor.

Claim 12

The circuit of claim 9 wherein said means for storing gate turn-off energy and returning energy into the GTO gate comprises a zener diode, a bipolar transistor having a collector coupled to said GTO gate, an emitter coupled to the junction of said capacitor and diode and a base coupled through said zener diode to the junction between said GTO and emitter switching transistor, said zener diode poled to avoid completely discharging said capacitor when said bipolar transistor is biased into conduction by the conduction of the emitter switching transistor.

Claim 13

An isolated driver circuit for a transistor driven emitter switch including a gate turn-off thyristor (GTO) in series with a bipolar emitter switching transistor, said driver circuit comprising: first controllable switch means coupled between the base of the emitter switching transistor and the anode of the GTO, for biasing the emitter switching transistor into conduction and maintaining said emitter switching transistor in a conductive state when said controllable switch means is conducting; second controllable switch means coupled across the base emitter terminals of said emitter switching transistor for biasing said emitter switching transistor out of conduction to turn off said GTO; third controllable switch means coupled to said first controllable switch means for biasing said first controllable switch means out of conduction when said emitter switch means is biased out of conduction; clamp means coupled to the gate of said GTO for clamping the gate of said GTO to a predetermined voltage sufficiently low to protect the emitter switched transistor when said emitter switched transistor is biased out of conduction and said GTO turns off, said clamp means coupled to an external power source; isolated switch means coupled to an external control for biasing said first controllable switch into conduction when said isolated switch is energized; fourth controllable switch means responsive to said isolated switch for providing a gate pulse to said GTO to turn said GTO on; and fifth controllable switch means responsive to said isolated switch and coupled to said second and third controllable switch means, said sixth controllable switch means preventing said second controllable switch means from biasing said emitter switching transistor out of conduction and preventing said third controllable switch means from biasing said first controllable switch means out of conduction only when said isolated switch means is conducting.

Claim 14

An isolated driver circuit for a transistor driven emitter switch including a gate turn-off thyristor (GTO) in series with a bipolar emitter switching transistor, said driver circuit comprising: first controllable switch means coupled between the base of the emitter switching transistor and the anode of the GTO, for biasing the emitter switching transistor into conduction and maintaining said emitter switching transistor in a conductive state when said controllable switch means is conducting; second controllable switch means coupled across the base emitter terminals of said emitter switching transistor for biasing said emitter switching transistor out of conduction to turn off said GTO; third controllable switch means coupled to said first controllable switch means for biasing said first controllable switch means out of conduction when said emitter switch means is biased out of conduction; clamp means coupled to the gate of said GTO for clamping the gate of said GTO to a predetermined voltage sufficiently low to protect the emitter switched transistor when said emitter switched transistor is biased out of conduction and said GTO turns off, said clamp means coupled to an external power source; isolated switch means coupled to an external control for biasing said first controllable switch into conduction when said isolated switch is energized; fourth controllable switch means responsive to said isolated switch for providing a gate pulse to said GTO to turn said GTO on; and fifth controllable switch means responsive to said isolated switch and coupled to said second and third controllable switch means, said sixth controllable switch means preventing said second controllable switch means from biasing said emitter switching transistor out of conduction and preventing said third controllable switch means from biasing said first controllable switch means out of conduction only when said isolated switch means is conducting.

Claim 15

The driver circuit of claim 12 wherein each said first, fourth and fifth, controllable switch means, respectively, comprises a bipolar transistor and said second and third controllable switch means, respectively, comprises MOSFETs.

Claim 16

An isolated driver circuit for a transistor driven power switch including a gate turn-off thyristor (GTO) in series with a bipolar emitter switching transistor, said driver circuit comprising: first controllable switch means coupled between the base of the emitter switching transistor and the anode of the GTO, for biasing the emitter switching transistor into conduction and maintaining said emitter switching transistor in a conductive state when said controllable switch means is conducting; second controllable switch means coupled to the gate of said GTO for providing a gate pulse to said GTO to turn said GTO on; third controllable switch means coupled across the base emitter terminals of said emitter switching transistor for biasing said emitter switching transistor out of conduction to turn said GTO off ; fourth controllable switch means coupled to said first controllable switch means for biasing said first controllable switch means out of conduction when said emitter switch means is biased out of conduction; clamp means coupled to the gate of said GTO for clamping the gate of said GTO to a predetermined voltage sufficiently low to protect the emitter switched transistor when said emitter switched transistor is biased out of conduction and said GTO turns off; an isolated switch; fifth controllable switch means coupled to said first and second controllable switch means and responsive to said isolated switch for biasing said first and second controllable switch means into conduction for biasing said emitter switching transistor and said GTO into conduction; and sixth controllable switch means coupled to said fifth controllable switch means and responsive to said isolated switch for preventing said third controllable switch means from biasing said emitter switching transistor out of conduction and for preventing said fourth controllable switch means from biasing said first controllable switch means out of conduction only when said isolated switch is conducting.

Claim 17

An isolated driver circuit for a transistor driven power switch including a gate turn-off thyristor (GTO) in series with a bipolar emitter switching transistor, said driver circuit comprising: first controllable switch means coupled between the base of the emitter switching transistor and the anode of the GTO, for biasing the emitter switching transistor into conduction and maintaining said emitter switching transistor in a conductive state when said controllable switch means is conducting; second controllable switch means coupled to the gate of said GTO for providing a gate pulse to said GTO to turn said GTO on; third controllable switch means coupled across the base emitter terminals of said emitter switching transistor for biasing said emitter switching transistor out of conduction to turn said GTO off ; fourth controllable switch means coupled to said first controllable switch means for biasing said first controllable switch means out of conduction when said emitter switch means is biased out of conduction; clamp means coupled to the gate of said GTO for clamping the gate of said GTO to a predetermined voltage sufficiently low to protect the emitter switched transistor when said emitter switched transistor is biased out of conduction and said GTO turns off; an isolated switch; fifth controllable switch means coupled to said first and second controllable switch means and responsive to said isolated switch for biasing said first and second controllable switch means into conduction for biasing said emitter switching transistor and said GTO into conduction; and sixth controllable switch means coupled to said fifth controllable switch means and responsive to said isolated switch for preventing said third controllable switch means from biasing said emitter switching transistor out of conduction and for preventing said fourth controllable switch means from biasing said first controllable switch means out of conduction only when said isolated switch is conducting.

Claim 18

The isolated driver circuit of claim 14 wherein said second controllable switch means for providing a gate pulse to said GTO couples the anode of said GTO to the gate of said GTO.

Claim 19

The isolated driver of claim 14 wherein said first and second controllable switch means each comprises an insulated gate transistor.

Claim 20

The isolated driver of claim 14 wherein each of said third, fourth, fifth and sixth controllable switch means, respectively, comprises a MOSFET.

Claim 21

The isolated driver of claim 14 wherein said clamp means comprises a capacitor coupled at one end through a diode to the gate of said GTO, said diode poled to conduct reverse GTO gate current to said capacitor, the other end of said capacitor coupled to the emitter of the emitter switching transistor.

Claim 22

The isolated driver of claim 18 wherein said clamp means further comprises a zener diode coupled in parallel with said capacitor to limit the capacitor voltage to a predetermined maximum.

Claim 23

The isolated driver of claim 18 wherein the junction between said diode and capacitor is coupled through a current limiting resistor to the anode of said GTO.