Single-shot circuit having process independent duty cycle

Claim 2

A single-shot circuit for producing a pulse of reference width upon receipt of a triggering signal comprising: single-shot circuit means having an input lead for receiving said triggering signal and having an output lead for providing a pulse of nominal width; analog feedback means connected to said output lead of said single shot circuit means, said analog feedback means including a comparison means for comparing the width of said pulse of nominal width with a desired reference pulse width and for generating an error signal, said error signal being fed back to said single-shot circuit means to produce an adjustment in said pulse of nominal width towards said desired reference pulse width.

Claim 3

A single-shot circuit in accordance with claim 1 wherein said analog feedback means comprises: a first voltage generator connected to said output lead of said single-shot circuit means, said first voltage generator having an output lead for generating a voltage of one polarity when a pulse is detected on said output lead of said single-shot circuit means; a second voltage generator connected to said output lead of said single-shot circuit menas, said second voltage generator having an output lead for generating a voltage of opposite polarity to said one polarity during the time that no pulse is detected on said output lead of said single-shot circuit means, wherein the ratio of said voltage of one polarity to said voltage of opposite polarity determines said reference pulse width; and integrator means connected to the output leads of said first and second voltage generators for integrating said voltages generated by said first and second voltage generators, and providing an integrated signal which is fed back to said single-shot circuit means to produce said adjustment in said pulse of nominal width towards said desired reference pulse width.

Claim 4

A single-shot circuit in accordance with claim 2 wherein said first voltage generator generates a positive voltage and said second voltage generator generates a negative voltage.

Claim 5

A single-shot circuit in accordance with claim 2 wherein said first voltage generator generates a negative voltage and said second voltage generator generates a voltage and said second voltage generator generates a positive voltage.

Claim 6

A single-shot circuit in accordance with claim 4 wherein said integrator means comprises an active integrator.

Claim 7

A single-shot circuit in accordance with claim 4 in combination with operational amplifier means, said operational amplifier means having an output lead, an inverting input lead, and having a noninverting input lead connected to receive said integrated signal for providing an amplified integrated signal, said output lead of said operational amplifier means feeding said amplified integrated signal back to said single-shot circuit means.

Claim 8

A single-shot circuit in accordance with claim 6 wherein said single-shot circuit means includes an operational amplifier and wherein said output lead of said operational amplifier means which is connected to the output lead of said integrator means is fed back to the positive input lead of said operational amplifier in said single-shot.

Claim 9

A single-shot circuit in accordance with claim 4 wherein said reference pulse width as defined by duty cycle X is given by the ratio of the absolute value of said positive voltage divided by the sum of the absolute values of said positive voltage and said negative voltage.

Claim 10

A single-shot circuit in accordance with claim 2 wherein said single-shot circuit means includes charge storage means, in combination with means to recharge said charge storage means.

Claim 11

A single-shot circuit in accordance with claim 9 wherein said means to recharge said charge storage means serves to recharge said charge storage means after a pulse is generated and said charge storage means is discharged.

Claim 12

A single-shot circuit in accordance with claim 9 wherein said means to recharge said charge storage means comprises a capacitor which is alternately charged from an available voltage through a first gating transistor and discharged into said charge storage means in said single-shot circuit means through a second gating transistor, said first gating and said second gating transistors being controlled by complementary, nonoverlapping clocking signals.

Claim 13

A single-shot circuit in accordance with claim 2 wherein said single-shot circuit means comprises: an inverter having an input lead and an output lead; means to retain a charge connected to said input lead of said inverter whereby the voltage level on said input lead to said inverter is controlled; and means for supplying a current connected to said means to retain a charge to thereby recharge said means to retain a charge, said means for supplying a current comprising: a first switch means having first and second current handling terminals and a control terminal, said first current handling terminal being connected with the output terminal of said integrator means for receiving an analog feedback signal; a second switch means having first current handling terminal connected to said second current handling terminal of said first switch means, a second current handling terminal connected to ground, and having a control terminal; a third switch means having a first current handling terminal connected with a positive supply voltage, a second current handling terminal, and a control terminal; a fourth switch means having a first current handling terminal connected to said second current handling terminal of said third switch means, a second current handling terminal connected with said means to retain a charge, and a control terminal; a feedback capacitor having a first terminal connected to said second current handling terminal of said first switch means and a second terminal connected to said second current handling terminal of said third switch means; a source of a first clocking signal, φ, being connected to said control terminals of said first and third switch means so that when φ is high said first and third switch means are on, said second and fourth switch means are off, and said analog feedback signal is impressed on said feedback capacitor; a source of second clocking signal, φ being connected to said control terminals of said second and fourth switch means, said clocking signals φ and φ being complementary and nonoverlapping whereby said feedback capacitor is charged in accordance with the potential of said analog feedback signals and said means to retain a charge is supplied a current whose value tends to adjust the high output signal appearing on said output lead of said inverter towards said reference pulse width.

Claim 14

A single-shot circuit in accordance with claim 12 wherein said means for supplying a current supplies a current to said means to retain a charge upon actuation by said clocking signals only after a pulse has been generated through said inverter and said means to retain a charge has been discharged.

Claim 15

A single-shot circuit capable of producing a pulse of a reference width upon receipt of a periodic triggering signal, comprising: a NOR gate having two input leads and an output lead, one of said input leads being connected to the source of said triggering signal; a capacitor having first and second leads, said first lead connected to said output lead of said NOR gate; an output stage having and input lead connected to said second lead of said capacitor, and an output lead from said output stage being connected to the other input lead of said NOR gate, said output stage having the property of producing a high output signal on said output lead upon sensing a low voltage on said capacitor; voltage generator means connected to an output lead of said output stage, said voltage generator means generating a voltage of one polarity and having a magnitude proportional to said reference pulse width when a pulse is detected from said output stage and further generating a voltage of the opposite polarity when no pulse is detected from said output stage; and integrator means having inverting and noninverting input leads and an output lead, said inverting input lead being connected to said voltage generator means for receiving said voltage of various polarities from said voltage generator and feeding said integrated error signal back to said output stage to adjust the actual pulse width towards said reference pulse width.

Claim 16

A single-shot circuit capable of producing a pulse of a reference width upon receipt of a periodic triggering signal, comprising: a NOR gate having two input leads and an output lead, one of said input leads being connected to the source of said triggering signal; a capacitor having first and second leads, said first lead connected to said output lead of said NOR gate; an output stage having and input lead connected to said second lead of said capacitor, and an output lead from said output stage being connected to the other input lead of said NOR gate, said output stage having the property of producing a high output signal on said output lead upon sensing a low voltage on said capacitor; voltage generator means connected to an output lead of said output stage, said voltage generator means generating a voltage of one polarity and having a magnitude proportional to said reference pulse width when a pulse is detected from said output stage and further generating a voltage of the opposite polarity when no pulse is detected from said output stage; and integrator means having inverting and noninverting input leads and an output lead, said inverting input lead being connected to said voltage generator means for receiving said voltage of various polarities from said voltage generator and feeding said integrated error signal back to said output stage to adjust the actual pulse width towards said reference pulse width.

Claim 17

A single-shot circuit in accordance with claim 14 wherein said integrator means is an operational amplifier configured as an active integrator.

Claim 18

A single-shot circuit in accordance with claim 14 in combination with amplifier means connected between the output lead of said integrator means and said output stage to amplify said error signal.

Claim 19

A single-shot circuit in accordance with claim 14 wherein said output stage is an operational amplifier having and inverting input lead, a noninverting input lead, and an output lead and wherein said output lead of said amplifier means is connected to said noninverting input lead of said operational amplifier.

Claim 20

A single-shot circuit in accordance with claim 14 wherein said output stage is an inverter, and said amplifier means applies said error signal to a charge generating means, said charge generating means applying charge represenative of the difference between the instantaneously detected pulse width and the said reference pulse to the input lead to said inverter to adjust the instaneous pulse width towards said said reference pulse width.

Claim 21

A single shot circuit in accordance with claim 2 wherein said first voltage generator, said second voltage generator and said integrator means are capable of being formed as a single integrated circuit device.