Patent US4577192A successfully refreshed from Google Patents.
US4577192A
Expired / Lapsed
US
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Electronic countermeasures false target system
Assignee: United States Department of the Air Force
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Filing: 1969-03-14
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Granted: 1986-03-18
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Expires: 1989-03-14
Abstract
Abstract There is disclosed herein a method of applying an active electronic countermeasure (ECM) False Target technique against MTI staggered pulse threat radar. This is accomplished by radar circuits which digitally transfer false target arrays grouped about low pulse repetition frequency (PRF) pulses to high PRF pulses, when they are present. The circuits of the invention then phase shift each transferred array with respect to the fundamental system clock rate to achieve proper alignment.
Inventors
- 👤 Richard J. Wiegand
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 14:18
CPC Classifications
G; G01; G01S; G01S7/00; G01S7/02; G01S7/38
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
111 words
In an electronic countermeasurers deception system wherein radar pulses are generated and transmitted as constituent pulses in reflected threat radar signals, apparatus for adapting to changes in threat radar pulse repetition frequency comprising a master range clock adapted to operate at a low pulse repetition frequency, a slave clock adapted to operate at a high pulse repetition frequency, means for generating and grouping an array of false target pulses around a low pulse repetition frequency radar signal, means for digitally transferring said array of false target pulses to a high pulse repetition frequency radar signal, and means for phase shifting said transferred array with respect to the master range clock rate.
Claim 2
Dependent Claim
111 words
In an electronic countermeasurers deception system wherein radar pulses are generated and transmitted as constituent pulses in reflected threat radar signals, apparatus for adapting to changes in threat radar pulse repetition frequency comprising a master range clock adapted to operate at a low pulse repetition frequency, a slave clock adapted to operate at a high pulse repetition frequency, means for generating and grouping an array of false target pulses around a low pulse repetition frequency radar signal, means for digitally transferring said array of false target pulses to a high pulse repetition frequency radar signal, and means for phase shifting said transferred array with respect to the master range clock rate.
Claim 3
Dependent Claim
153 words
An electronic countermeasures system for generating false target pulses in threat radar signals comprising first and second logic circuits, each said logic circuit being adapted to register input signals, determine the count of inter pulse periods and generate early and late gates for phase correction, first and second phase comparison means respectively connected to the outputs of said first and second logic circuits, first and second servo means respectively connected to the outputs of said first and second phase comparison means, a voltage controlled oscillator connected between said first phase comparison means and said first logic circuit, phase shifting means connected between said first and second logic circuits and said second servo means, false target program means adapted to generate false target pulses connected between said first and second logic circuits, and means for delivering input pulses to said first and second logic circuits and to said first and second phase comparison means.
Claim 4
Dependent Claim
153 words
An electronic countermeasures system for generating false target pulses in threat radar signals comprising first and second logic circuits, each said logic circuit being adapted to register input signals, determine the count of inter pulse periods and generate early and late gates for phase correction, first and second phase comparison means respectively connected to the outputs of said first and second logic circuits, first and second servo means respectively connected to the outputs of said first and second phase comparison means, a voltage controlled oscillator connected between said first phase comparison means and said first logic circuit, phase shifting means connected between said first and second logic circuits and said second servo means, false target program means adapted to generate false target pulses connected between said first and second logic circuits, and means for delivering input pulses to said first and second logic circuits and to said first and second phase comparison means.
Claim 5
Dependent Claim
132 words
An electronic countermeasures system as defined in claim 2 wherein said phase shifting means comprises an input, an output, an AND gate, first flip-flop means connected between said input and said AND gate, second flip-flop means connected between said output and said AND gate, filter means connected to the output of said AND gate, said filter means being adapted to convert waveforms summed by said AND gate into a d.c. voltage level, an inverting amplifier means connected to the output of said filter means and said second servo means, said amplifier means being adapted to compare and control said d.c. voltage level with respect to the reference control voltage of said second servo means, and a voltage controlled oscillator, said voltage controlled oscillator being responsive to the output of said amplifier means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-03-17 | 1989-09-16 | 1990-03-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-03-17 | 1993-09-16 | 1994-03-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-03-17 | 1997-09-16 | 1998-03-18 | $7700.00 | Window Closed / Lapsed |