Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
294 words
A circuit for changing a signal voltage level, comprising: input means for receiving an input binary signal; gate means, connected to said input means, for generating an output binary signal corresponding to the input binary signal; a first reference terminal to which a high voltage, higher than the high level of said input binary signal, is supplied; a second reference terminal to which a constant voltage lower than the high voltage and equal to or higher than the high level of said input binary signal is supplied; a disconnecting n-channel MOS transistor having a current path with two ends, one end of which is connected to said gate means, and a gate which is connected to said second reference terminal; inverting means, having a first input terminal which is connected to the other end of the current path of said disconnecting n-channel MOS transistor and a second input terminal which is connected to said gate means, for converting the output binary signal of said gate means to a higher-volage binary signal, said inverting means having an output terminal for providing the converted higher-voltage binary signal; and feedback means, comprising a p-channel MOS transistor having a source connected to the first reference terminal, a drain connected to said first input terminal of said inverting means, and a gate connected to said output terminal of said inverting means, for causing the voltage level at said first input terminal of said inverting means to be set at said high voltage when the voltage of the converted higher-voltage binary signal reaches a given voltage level, said disconnecting n-channel MOS transistor electrically isolating said gate means and said second input terminal of said inverting means from the high voltage applied at said first input terminal of said inverting means.
Claim 2
Dependent Claim
294 words
A circuit for changing a signal voltage level, comprising: input means for receiving an input binary signal; gate means, connected to said input means, for generating an output binary signal corresponding to the input binary signal; a first reference terminal to which a high voltage, higher than the high level of said input binary signal, is supplied; a second reference terminal to which a constant voltage lower than the high voltage and equal to or higher than the high level of said input binary signal is supplied; a disconnecting n-channel MOS transistor having a current path with two ends, one end of which is connected to said gate means, and a gate which is connected to said second reference terminal; inverting means, having a first input terminal which is connected to the other end of the current path of said disconnecting n-channel MOS transistor and a second input terminal which is connected to said gate means, for converting the output binary signal of said gate means to a higher-volage binary signal, said inverting means having an output terminal for providing the converted higher-voltage binary signal; and feedback means, comprising a p-channel MOS transistor having a source connected to the first reference terminal, a drain connected to said first input terminal of said inverting means, and a gate connected to said output terminal of said inverting means, for causing the voltage level at said first input terminal of said inverting means to be set at said high voltage when the voltage of the converted higher-voltage binary signal reaches a given voltage level, said disconnecting n-channel MOS transistor electrically isolating said gate means and said second input terminal of said inverting means from the high voltage applied at said first input terminal of said inverting means.
Claim 3
Dependent Claim
13 words
A circuit according to claim 1, wherein said gate means comprises an inverter.
Claim 4
Dependent Claim
76 words
A circuit according to claim 1, wherein said inverting means comprises: a p-channel MOS transistor having a source connected to the first reference terminal, a drain connected to said output terminal, and a gate connected to said first input terminal; and an n-channel MOS transistor having a drain connected to said output terminal, a source connected to a terminal to which a ground level voltage is applied, and a gate connected to said second input terminal.