US4573139A — System for position sensing transducers

Claim 1

Independent Claim 438 words

Apparatus for selectively interfacing signals to a computer from either a first or a second transducer disposed for monitoring the relative position of an object, said second transducer being of the type arranged to provide a reference signal and a position signal whose phase relationship with said reference signal is indicative of position, and said first transducer being of the type providing A and B signals whose phase relationship is indicative of directional changes in position and whose number of transitions in amplitude occuring relative to a marker signal is indicative of position, comprising: (a) a digital counter operable in a first mode as a reversing counter and operable in a second mode as a reference counter, said counter providing an output count which in each mode is indicative of the object's position; (b) mode select means for causing said counter to operate in the first mode or the second mode depending on whether signals from said first transducer or said second transducer are to be interfaced to said computer; (c) data latching means connected between said computer and said counter for receiving the output count from said counter and for holding the output count for a commanded transfer to said computer; (d) means providing a clock signal for signal synchronization and for reference counting; (e) means receiving said A and B signals from said first transducer and responsive thereto to generate a count signal indicative of said transitions of said A and B signals, said count signal being counted up or down by said counter depending on the phase relationship said A and B signals when said counter is in said first mode; (f) means receiving the reference signal of said second transducer and responsive thereto to cause said counter to reset to a zero count upon each occurrence of said reference signal and then to allow said counter to begin counting said clock signal when said counter is in said second mode; (g) means receiving the position signal of said second transducer and responsive thereto to generate a control signal causing said data latching means to hold the output count of said counter occuring substantially simultaneously with said position signal when said counter is in said second mode; (h) data transfer control means responsive to a read command from said computer when said counter is in said second mode, for carrying out said commanded transfer of the position indicative count to said computer, and responsive to said read command from said computer when said counter is in said first mode, for latching and carrying out said commanded transfer of the position indicative count to said computer.

Claim 2

Dependent Claim 438 words

Apparatus for selectively interfacing signals to a computer from either a first or a second transducer disposed for monitoring the relative position of an object, said second transducer being of the type arranged to provide a reference signal and a position signal whose phase relationship with said reference signal is indicative of position, and said first transducer being of the type providing A and B signals whose phase relationship is indicative of directional changes in position and whose number of transitions in amplitude occuring relative to a marker signal is indicative of position, comprising: (a) a digital counter operable in a first mode as a reversing counter and operable in a second mode as a reference counter, said counter providing an output count which in each mode is indicative of the object's position; (b) mode select means for causing said counter to operate in the first mode or the second mode depending on whether signals from said first transducer or said second transducer are to be interfaced to said computer; (c) data latching means connected between said computer and said counter for receiving the output count from said counter and for holding the output count for a commanded transfer to said computer; (d) means providing a clock signal for signal synchronization and for reference counting; (e) means receiving said A and B signals from said first transducer and responsive thereto to generate a count signal indicative of said transitions of said A and B signals, said count signal being counted up or down by said counter depending on the phase relationship said A and B signals when said counter is in said first mode; (f) means receiving the reference signal of said second transducer and responsive thereto to cause said counter to reset to a zero count upon each occurrence of said reference signal and then to allow said counter to begin counting said clock signal when said counter is in said second mode; (g) means receiving the position signal of said second transducer and responsive thereto to generate a control signal causing said data latching means to hold the output count of said counter occuring substantially simultaneously with said position signal when said counter is in said second mode; (h) data transfer control means responsive to a read command from said computer when said counter is in said second mode, for carrying out said commanded transfer of the position indicative count to said computer, and responsive to said read command from said computer when said counter is in said first mode, for latching and carrying out said commanded transfer of the position indicative count to said computer.

Claim 3

Dependent Claim 34 words

The apparatus of claim 1 further including means to zero said counter when in said first mode to establish a reference point against which changes in the position of said object may be determined.

Claim 4

Dependent Claim 26 words

The apparatus of claim 2 further including error detecting circuitry for detecting errors in signals indicative of those signals provided by said first and second transducers.

Claim 5

Dependent Claim 85 words

The apparatus of claim 3 wherein said data latching means comprises a pair of data latches for holding the output count in two bytes, and said data transfer control means includes means for receiving said read signal and an address signal from the computer to generate a read-zero signal and a read-one signal, and means responsive to said read-zero and read-one signals to cause said data latching means to hold the output count until both bytes of said pair have been transferred to the computer.

Claim 6

Dependent Claim 58 words

The apparatus of claim 4 wherein said error detecting circuitry comprises: (a) means responsive to an elapsed time period during which said control signal is not generated, to provide a first error indicative signal; and (b) means responsive to substantially simultaneous transitions of signals indicative of said A and B signals, to provide a second error indicative signal.

Claim 7

Dependent Claim 52 words

The apparatus of claim 5 wherein said mode select means includes a gate circuit receiving signals indicative of said A and B signals and responsive to the phase relationship thereof to automatically direct said counter to count said count signal up or down depending on the direction of movement of said object.

Claim 8

Dependent Claim 14 words

The apparatus of claim 6 wherein said digital counter comprises a 12-bit synchronous counter.

Claim 9

Dependent Claim 383 words

An interfacing system for selectively interfacing signals to a control computer of a numerical control system from either an encoder providing Phase A and Phase B signals and a marker signal or from a resolver providing a reference signal and a position signal, the encoder or resolver being disposed to monitor the position of an object whose position is controlled by the numerical control system, comprising: (a) a digital counter operable in a first mode as a reversing counter when signals from the encoder are to be interfaced and operable in a second mode as a reference counter counting a clock signal when signals from the resolver are to be interfaced, the counter providing a count value which in each mode is indicative of the present position of the object; (b) a data latch connected between the counter and the control computer for receiving the count value from the counter and for holding it to be read by the computer; (c) means operative in combination with the counter in the first mode for receiving the phase A and phase B signals and responsive thereto to produce a countable first signal wherein each count is indicative of a change in position of said object and to produce a second signal indicative of the direction of such change, said first signal being supplied to the counter and thereby counted and said second signal being supplied to the counter and determining the up or down count direction thereof; (d) means operative in combination with the counter in the second mode for receiving the reference signal and responsive thereto to cause the counter to be reset to a zero count value on each occurrence of the reference signal; (e) means operative in combination with the counter in the second mode for receiving the position signal and responsive thereto to cause the data latch to obtain and hold the count value occurring substantially simultaneously with the postion signal; (e) data transfer control means for receiving a read command from the computer and responsive thereto to cause said data latch to latch-in the present position count value from the counter when the counter is in the first mode and to allow the computer to read the present position count when the counter is in said first or second mode.

Claim 10

Dependent Claim 383 words

An interfacing system for selectively interfacing signals to a control computer of a numerical control system from either an encoder providing Phase A and Phase B signals and a marker signal or from a resolver providing a reference signal and a position signal, the encoder or resolver being disposed to monitor the position of an object whose position is controlled by the numerical control system, comprising: (a) a digital counter operable in a first mode as a reversing counter when signals from the encoder are to be interfaced and operable in a second mode as a reference counter counting a clock signal when signals from the resolver are to be interfaced, the counter providing a count value which in each mode is indicative of the present position of the object; (b) a data latch connected between the counter and the control computer for receiving the count value from the counter and for holding it to be read by the computer; (c) means operative in combination with the counter in the first mode for receiving the phase A and phase B signals and responsive thereto to produce a countable first signal wherein each count is indicative of a change in position of said object and to produce a second signal indicative of the direction of such change, said first signal being supplied to the counter and thereby counted and said second signal being supplied to the counter and determining the up or down count direction thereof; (d) means operative in combination with the counter in the second mode for receiving the reference signal and responsive thereto to cause the counter to be reset to a zero count value on each occurrence of the reference signal; (e) means operative in combination with the counter in the second mode for receiving the position signal and responsive thereto to cause the data latch to obtain and hold the count value occurring substantially simultaneously with the postion signal; (e) data transfer control means for receiving a read command from the computer and responsive thereto to cause said data latch to latch-in the present position count value from the counter when the counter is in the first mode and to allow the computer to read the present position count when the counter is in said first or second mode.

Claim 11

Dependent Claim 41 words

The interfacing system of claim 8 further including means operable in combination with the counter in said first mode to cause the counter to reset to a zero count indicative of a reference position of said object, upon an operator's command.

Claim 12

Dependent Claim 25 words

The interfacing system of claim 9 wherein said counter comprises a 12-bit synchronous counter and said data latch comprises first and second 8-bit data latches.

Claim 13

Dependent Claim 67 words

The interfacing system of claim 10 wherein said data transfer control means includes: (a) means responsive to said read command to transfer said count value from said first and second 8-bit latches to the computer in two sequential bytes; and (b) means responsive to said read command to cause said data latches to retain the present position count value until the transfer of both bytes is complete.

Claim 14

Dependent Claim 56 words

The interfacing system of claim 11 further including: (a) means for detecting the substantially simultaneous occurrence of phase A and phase B signals as an indication of error in the encoder signals; and (b) means for detecting loss of the position signal during a predetermined time period as an indication of error in the resolver signals.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1989-02-24	1989-08-26	1990-02-25	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1993-02-24	1993-08-26	1994-02-25	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1997-02-24	1997-08-26	1998-02-25	$7700.00	Window Closed / Lapsed

System for position sensing transducers

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