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US4573099A
Expired / Lapsed
US
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CMOS Circuit overvoltage protection
Assignee: Nokia Bell Labs
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Filing: 1984-06-29
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Granted: 1986-02-25
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Expires: 2004-06-29
Abstract
Abstract A CMOS circuit (10) for preventing overvoltage between two supply nodes (12,14) makes use of vertical NPN bipolar transistors (80,84) for their current-carrying capability. Zener diodes (16,18,20,22) and a resistor (24) generate a sensing voltage which is amplified by a vertical bipolar transistor (28) and coupled to one input of a comparator (40) which has the other input at a bias voltage node (52) of a voltage divider (54,56,58,60). The comparator output (50) is coupled to the input of a transimpedance transistor (72) which drives the input current of a current mirror (66,74). The output (78) of the current mirror turns on the current-carrying transistors (80,84). Positive feedback for latching is provided by connecting the common gates of the current mirror transistors to the gate of a feedback transistor (86) which has its current path connected between the one supply node and the base (26) of the first bipolar transistor. The vertical bipolar transistors (28,80,84) of the circuit include guard rings (37) of heavily doped material about the emitter (32) and base (34) regions at the surface and tied to the collector voltage.
Inventors
- 👤 Apparajan Ganesan
- 👤 Ronald A. Morrison
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:31
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356104; H03K17/00; H03K17/08; H03K17/081; H03K17/0814; H03K17/08142; H10; H10D; H10D89/00; H10D89/60; H10D89/601
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
167 words
Apparatus for protecting an electronic circuit from an overvoltage surge between positive and a negative supply voltage nodes, comprising: a first vertical bipolar transistor having its emitter-collector path connected between the supply nodes; a second vertical bipolar transistor having its emitter-collector path connected between one of the supply nodes and the base of the first vertical bipolar transistor; a first resistor connected between the base of the first bipolar transistor and the other supply node, and switching means responsive to an overvoltage condition between the supply nodes connected to the base of the second bipolar transistors for turning on the first and second bipolar transistors for the course of the overvoltage condition, the switching means including a latch circuit and a voltage sensing means which generates an activating voltage in response to an overvoltage, and a comparator having two input nodes, one of the input nodes being coupled to the activating voltage and the other input node being coupled to the input of a bias voltage node.
Claim 2
Dependent Claim
167 words
Apparatus for protecting an electronic circuit from an overvoltage surge between positive and a negative supply voltage nodes, comprising: a first vertical bipolar transistor having its emitter-collector path connected between the supply nodes; a second vertical bipolar transistor having its emitter-collector path connected between one of the supply nodes and the base of the first vertical bipolar transistor; a first resistor connected between the base of the first bipolar transistor and the other supply node, and switching means responsive to an overvoltage condition between the supply nodes connected to the base of the second bipolar transistors for turning on the first and second bipolar transistors for the course of the overvoltage condition, the switching means including a latch circuit and a voltage sensing means which generates an activating voltage in response to an overvoltage, and a comparator having two input nodes, one of the input nodes being coupled to the activating voltage and the other input node being coupled to the input of a bias voltage node.
Claim 3
Dependent Claim
67 words
The apparatus as defined in claim 1 comprising current amplifying means having an input connected to an output node of the comparator and having an output connected to the base of the second bipolar transistor, and further comprising positive feedback means connected between the current amplifying means and the sensing means for latching the first and second bipolar transistors in their conducting condition during the overvoltage condition.
Claim 4
Dependent Claim
16 words
The apparatus as defined in claim 2 wherein the voltage sensing means includes a voltage buffer.
Claim 5
Dependent Claim
27 words
The apparatus as defined in claim 3 wherein the sensing means includes a zener diode connected in series with a first, sensing resistor between the supply nodes.
Claim 6
Dependent Claim
47 words
The apparatus as defined in claim 4 wherein the voltage buffer comprises a transconductance transistor having its conduction path connected between one supply node and one input of the comparator and a second resistor connected between the other supply node and the one input of the comparator.
Claim 7
Dependent Claim
34 words
The apparatus as defined in claim 5 wherein the transconductance transistor is a third vertical bipolar transistor having the second resistor connected between one side of its emitter-collector path and the other supply node.
Claim 8
Dependent Claim
40 words
The apparatus as defined in claim 6 wherein the current amplifying means includes first and second current mirror transistors having one side of their conduction paths connected to one of the supply nodes and having their control electrodes connected together.
Claim 9
Dependent Claim
55 words
The apparatus as defined in claim 7 wherein the positive feedback means comprises a feedback transistor having its current path connected between one of the supply nodes and the common node of the zener diode and the first, sensing resistor and having its control electrode connected to the control electrodes of the current mirror transistors.
Claim 10
Dependent Claim
42 words
The apparatus as defined in claim 8 comprising control means having an input connected to the other input of the comparator and having an output connected to the other side of the conduction path of one of the current mirror input transistors.
Claim 11
Dependent Claim
64 words
The apparatus as defined in claim 9 wherein the control means comprises at least two field effect transimpedance transistors having their conduction paths connected in series between the other side of the conduction path of the current mirror input transistor and the other supply node, the control electrode of one of the field effect transistors being coupled to the other input of the comparator.
Claim 12
Dependent Claim
46 words
The apparatus as defined in claim 10 comprising a plurality of resistors connected in series between the supply nodes to form a voltage divider, the contol electrodes of the other transimpedance transistors being connected to appropriate bias voltage nodes between the resistors of the voltage divider.
Claim 13
Dependent Claim
24 words
The apparatus as defined in claim 11 comprising a zener diode connected between one of the other transimpedance transistors and the other supply node.
Claim 14
Dependent Claim
25 words
The apparatus as defined in claim 12 wherein the feedback transistor, the current mirror transistors, and any transistors of the comparator are field effect transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-02-24 | 1989-08-26 | 1990-02-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-02-24 | 1993-08-26 | 1994-02-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-02-24 | 1997-08-26 | 1998-02-25 | $7700.00 | Window Closed / Lapsed |