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US4567602A Expired / Lapsed US ⏱️ 0.0 years remaining

Correlated signal processor

Assignee: Canadian Patents and Development Ltd
•
Filing: 1983-06-13
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Granted: 1986-01-28
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Expires: 2003-06-13
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Abstract

Abstract A cross-correlated baseband signal processor for providing in-phase and quadrature phase shifted NRZ signals from an input signal, apparatus for cross-correlating the in-phase and quadrature shifted signals, and apparatus for generating in-phase and quadrature shifted intersymbol-interference and jitter free (IJF) modulated output signals having amplitudes such that the vector sum of the output signals is approximately the same at virtually all phase angles of each bit period. The resultant cross-correlated bandlimited PSK signal (XPSK) has an almost constant envelope and thus it can be passed through a saturated amplifier without AM/PM and AM/AM degradation and without the need for post-amplification filtering, as there is no spectral restoration (regrowth).

Inventors

  • 👤 Shuzo Kato
  • 👤 Kamilo Feher

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 20:06
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/20; H04L27/2032; H04L27/2053; H04L27/206; H04L27/2067; H04L27/2078; H04L27/2082

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 178 words
A cross-corrected signal processor comprising: (a) means for providing in-phase and quadrature phase shifted NRZ digital input signals, (b) means for cross-correlating each two symbols of the in-phase signal with each two symbols of the quadrature signal, every half symbol and providing in-phase and quadrature phase shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes modified from the peak amplitudes of IJF encoded signals according to the following schedule: (i) when the in-phase channel signal is zero, the quadrature shifted signal is the maximum IJF amplitude according to its wave shape, (ii) when the in-phase channel signal is non-zero, the maximum magnitude of the quadrature shifted signal is reduced from 1 normalized to A, where ##EQU11## (iii) when the quadrature channel signal is zero, the in-phase signal is the maximum IJF amplitude according to its wave shape, (iv) when the quadrature channel signal is non-zero, the in-phase signal is reduced from 1 (normalized) to A, where ##EQU12## (c) and means for quadrature modulating the in-phase and quadrature output signals, to provide a cross-correlated modulated output signal.
Claim 2
Dependent Claim 178 words
A cross-corrected signal processor comprising: (a) means for providing in-phase and quadrature phase shifted NRZ digital input signals, (b) means for cross-correlating each two symbols of the in-phase signal with each two symbols of the quadrature signal, every half symbol and providing in-phase and quadrature phase shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes modified from the peak amplitudes of IJF encoded signals according to the following schedule: (i) when the in-phase channel signal is zero, the quadrature shifted signal is the maximum IJF amplitude according to its wave shape, (ii) when the in-phase channel signal is non-zero, the maximum magnitude of the quadrature shifted signal is reduced from 1 normalized to A, where ##EQU11## (iii) when the quadrature channel signal is zero, the in-phase signal is the maximum IJF amplitude according to its wave shape, (iv) when the quadrature channel signal is non-zero, the in-phase signal is reduced from 1 (normalized) to A, where ##EQU12## (c) and means for quadrature modulating the in-phase and quadrature output signals, to provide a cross-correlated modulated output signal.
Claim 3
Dependent Claim 11 words
A signal processor as defined in claim 1, in which ##EQU13##
Claim 4
Dependent Claim 215 words
A signal processor as defined in claim 1, in which the one signal changes its bit value in two consecutive bits while the other signal bit value remains the same, including means for generating the functions: G (t)=A sin (πt/Ts) G (t)=-A sin (πt/Ts) G (t)=A cos (πt/Ts) G (t)=-A cos (πt/Ts) and in which the said one signal does not change its bit value in two consecutive bits while said other signal does not change its bit value, including means for generating the functions G (t)=1-K cos.sup.2 (πt/Ts) G (t)=1-K sin.sup.2 (πt/Ts) G (t)=-1+K cos.sup.2 (πt/Ts) G (t)=-1+K sin.sup.2 (πt/Ts) where K=1-A and in which said one signal changes its bit value in two consecutive bits while said other signal changes its bit value, including means for generating the functions G (t)=sin (πt/Ts) G (t)=-sin (πt/Ts) G (t)=cos (πt/Ts) G (t)=-cos (πt/Ts) and in which said one signal does not change its bit value in two consecutive bits while said other signal changes its bit value, including means for generating the functions G (t)=A G (t)=-A in which ##EQU14## t/Ts is the function interval, where Ts is the symbol, the functions G (t) following each other according to IJF encoding without discontinuation, to provide said cross-correlated phase shifted keyed in-phase and quadrature output signals.
Claim 5
Dependent Claim 29 words
A signal processor as defined in claim 3, including means for multiplexing said functions serially according to cross-correlation between said in-phase and quadrature signals to provide said output signals.
Claim 6
Dependent Claim 18 words
A signal processor as defined in claim 3 or 4, in which the function interval is π/2 radians.
Claim 7
Dependent Claim 89 words
A cross-correlated signal processor comprising: (a) means for providing in-phase and quadrature phase shifted NRZ signals from an input signal, (b) means for cross-correlating the in-phase and quadrature shifted signals, (c) means for generating in-phase and quadrature shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes such that the vector sum of the output signals is approximately the same at virtually all phase angles of each bit period, (d) and means for quadrature modulating the in-phase and quadrature output signals, to provide a cross-correlated modulated output signal.
Claim 8
Dependent Claim 89 words
A cross-correlated signal processor comprising: (a) means for providing in-phase and quadrature phase shifted NRZ signals from an input signal, (b) means for cross-correlating the in-phase and quadrature shifted signals, (c) means for generating in-phase and quadrature shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes such that the vector sum of the output signals is approximately the same at virtually all phase angles of each bit period, (d) and means for quadrature modulating the in-phase and quadrature output signals, to provide a cross-correlated modulated output signal.
Claim 9
Dependent Claim 140 words
A signal processor as defined in claim 6, including means for cross-correlating each two symbols of the in-phase signal with each two symbols of the quadrature shifted signal, every half symbol, and for generating in-phase output and quadrature shifted output signals having IJF coded waveforms with amplitudes according to the following schedule: (i) when the in-phase channel signal is zero, the quadrature shifted signal is the maximum IJF amplitude according to its wave shape, (ii) when the in-phase channel signal is non-zero, the maximum magnitude of the quadrature shifted signal is reduced from 1 (normalized) to A, where ##EQU15## (iii) when the quadrature channel signal is zero, the in-phase signal is the maximum IJF amplitude according to its wave shape, (iv) when the quadrature channel signal is non-zero, the in-phase signal is reduced from 1 (normalized) to A, where ##EQU16##
Claim 10
Dependent Claim 10 words
A signal processor as defined in claim 7 where ##EQU17##
Claim 11
Dependent Claim 27 words
A signal processor as defined in claim 1, further including means for quadrature modulating the in-phase and quadrature output signals, to provide a cross-correlated modulated output signal.
Claim 12
Dependent Claim 99 words
A signal processor as defined in claim 6 further including a local oscillator, for providing a carrier signal, means for phase shifting the carrier signal by 90°, means for multiplying the carrier signal with either the in-phase output signal or the quadrature output signal to provide a first modulated signal, means for multiplying the phase shifted carrier signal with the other of the in-phase output signal or the quadrature output signal to provide a second modulated signal, and means for summing the modulated signals, to provide a cross-correlated modulated signal having low envelope fluctuation, controlled spectrum and limited sidelobes.
Claim 13
Dependent Claim 112 words
A signal processor as defined in claim 1, or 6, further including a local oscillator, for providing a carrier signal, means for phase shifting the carrier signal by 90°, means for multiplying the carrier signal with either the in-phase output signal or the quadrature output signal to provide a first modulated signal, means for multiplying the phase shifted carrier signal with the other of the in-phase output signal or the quadrature output signal to provide a second modulated signal, and means for summing the modulated signals, and means for applying the summed modulated signals to a high power output amplifier operated in its saturated mode, for amplification and transmission to an antenna.
Claim 14
Dependent Claim 63 words
A signal processor comprising means for cross-correlating in-phase and quadrature phase shifted NRZ input signals, and means for receiving said signals and for generating in-phase and quadrature shifted intersymbol-interference and jitter free (IJF) encoded output signals from said signals having amplitudes such that the vector sum of the output signals is approximately the same at virtually all phase angles at each bit period.
Claim 15
Dependent Claim 63 words
A signal processor comprising means for cross-correlating in-phase and quadrature phase shifted NRZ input signals, and means for receiving said signals and for generating in-phase and quadrature shifted intersymbol-interference and jitter free (IJF) encoded output signals from said signals having amplitudes such that the vector sum of the output signals is approximately the same at virtually all phase angles at each bit period.
Claim 16
Dependent Claim 173 words
A cross-correlated signal processor comprising: (a) means for cross-correlating each two symbols of an in-phase NRZ digital signal with each two symbols of a quadrature phase shifted signal of the in-phase signal, every half symbol and providing in-phase and quadrature phase shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes modified from the peak amplitudes of IJF encoded signals according to the following schedule: (i) when the in-phase channel signal is zero, the quadrature shifted signal is the maximum IJF amplitude according to its wave shape, (ii) when the in-phase channel signal is non-zero, the maximum magnitude of the quadrature shifted signal is reduced from 1 (normalized) to A, where ##EQU18## (iii) when the quadrature channel signal is zero, the in-phase signal is the maximum IJF amplitude according to its wave shape, (iv) when the quadrature channel signal is non-zero, the in-phase signal is reduced from 1 (normalized) to a, where ##EQU19## (v) and means for quadrature modulating the in-phase and quadrature output signals to provide a cross-correlated modulated output signal.
Claim 17
Dependent Claim 173 words
A cross-correlated signal processor comprising: (a) means for cross-correlating each two symbols of an in-phase NRZ digital signal with each two symbols of a quadrature phase shifted signal of the in-phase signal, every half symbol and providing in-phase and quadrature phase shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes modified from the peak amplitudes of IJF encoded signals according to the following schedule: (i) when the in-phase channel signal is zero, the quadrature shifted signal is the maximum IJF amplitude according to its wave shape, (ii) when the in-phase channel signal is non-zero, the maximum magnitude of the quadrature shifted signal is reduced from 1 (normalized) to A, where ##EQU18## (iii) when the quadrature channel signal is zero, the in-phase signal is the maximum IJF amplitude according to its wave shape, (iv) when the quadrature channel signal is non-zero, the in-phase signal is reduced from 1 (normalized) to a, where ##EQU19## (v) and means for quadrature modulating the in-phase and quadrature output signals to provide a cross-correlated modulated output signal.
Claim 18
Dependent Claim 367 words
A cross-correlated signal processor comprising: (a) means for providing in-phase and quadrature phase shifted NRZ digital input signals, (b) means for cross-correlating each two symbols of the in-phase signal with each two symbols of the quadrature signal, every half symbol and providing in-phase and quadrature phase shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes modified from the peak amplitudes of IJF encoded signals according to the following schedule: (i) when the in-phase channel signal is zero, the quadrature shifted signal is the maximum IJF amplitude according to its wave shape, (ii) when the in-phase channel signal is non-zero, the maximum magnitude of the quadrature shifted signal is reduced from 1 (normalized) to A, where ##EQU20## (iii) when the quadrature channel signal is zero, the in-phase signal is the maximum IJF amplitude according to its wave shape, (iv) when the quadrature channel signal is non-zero, the in-phase signal is reduced from 1 (normalized) to A, where ##EQU21## (c) in which the one signal changes its bit value in two consecutive bits while the other signal bit value remains the same, including means for generating the functions: G (t)=A sin (πt/Ts) G (t)=-A sin (πt/Ts) G (t)=A cos (πt/Ts) G (t)=-A cos (πt/Ts) and in which the said one signal does not change its bit value in two consecutive bits while said other signal does not change its bit value, including means for generating the functions G (t)=1-K cos.sup.2 (πt/Ts) G (t)=1-K sin.sup.2 (πt/Ts) G (t)=-1+K cos.sup.2 (πt/Ts) G (t)=-1+K sin.sup.2 (πt/Ts) where K=1-A and in which said one signal changes its bit value in two consecutive bits while said other signal changes its bit value, including means for generating the functions G (t)=sin (πt/Ts) G (t)=-sin (πt/Ts) G (t)=cos (πs/Ts) G (t)=-cos (πt/Ts) and in which said one signal does not change its bit value in two consecutive bits while said other signal changes its bit value, including means for generating the functions G (t)=A G (t)=-A in which ##EQU22## t/Ts is the function interval, where Ts is the symbol, the functions G (t) following each other according to IJF encoding without discontinuation, to provide said cross-correlated phase shifted keyed in-phase and quadrature output signals.
Claim 19
Dependent Claim 367 words
A cross-correlated signal processor comprising: (a) means for providing in-phase and quadrature phase shifted NRZ digital input signals, (b) means for cross-correlating each two symbols of the in-phase signal with each two symbols of the quadrature signal, every half symbol and providing in-phase and quadrature phase shifted intersymbol-interference and jitter free (IJF) encoded output signals having amplitudes modified from the peak amplitudes of IJF encoded signals according to the following schedule: (i) when the in-phase channel signal is zero, the quadrature shifted signal is the maximum IJF amplitude according to its wave shape, (ii) when the in-phase channel signal is non-zero, the maximum magnitude of the quadrature shifted signal is reduced from 1 (normalized) to A, where ##EQU20## (iii) when the quadrature channel signal is zero, the in-phase signal is the maximum IJF amplitude according to its wave shape, (iv) when the quadrature channel signal is non-zero, the in-phase signal is reduced from 1 (normalized) to A, where ##EQU21## (c) in which the one signal changes its bit value in two consecutive bits while the other signal bit value remains the same, including means for generating the functions: G (t)=A sin (πt/Ts) G (t)=-A sin (πt/Ts) G (t)=A cos (πt/Ts) G (t)=-A cos (πt/Ts) and in which the said one signal does not change its bit value in two consecutive bits while said other signal does not change its bit value, including means for generating the functions G (t)=1-K cos.sup.2 (πt/Ts) G (t)=1-K sin.sup.2 (πt/Ts) G (t)=-1+K cos.sup.2 (πt/Ts) G (t)=-1+K sin.sup.2 (πt/Ts) where K=1-A and in which said one signal changes its bit value in two consecutive bits while said other signal changes its bit value, including means for generating the functions G (t)=sin (πt/Ts) G (t)=-sin (πt/Ts) G (t)=cos (πs/Ts) G (t)=-cos (πt/Ts) and in which said one signal does not change its bit value in two consecutive bits while said other signal changes its bit value, including means for generating the functions G (t)=A G (t)=-A in which ##EQU22## t/Ts is the function interval, where Ts is the symbol, the functions G (t) following each other according to IJF encoding without discontinuation, to provide said cross-correlated phase shifted keyed in-phase and quadrature output signals.

References Cited (Backward Citations)

US3518680A Cited
US3731233A Cited
US4338579A Cited
US4324001A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-01-27 1989-07-29 1990-01-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-01-27 1993-07-29 1994-01-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-01-27 1997-07-29 1998-01-28 $7700.00 Window Closed / Lapsed

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