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US4567572A Expired / Lapsed US ⏱️ 0.0 years remaining

Fast parallel sorting processor

Assignee: National Security Agency
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Filing: 1983-02-22
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Granted: 1986-01-28
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Expires: 2003-02-22
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Abstract

Abstract An information processor is described which is especially suitable for efficiently sorting large quantities of binary data. Data in a plurality of storage devices is fed to a plurality of compare-exchange modules and is then selectively passed back to the storage devices by means of multi-input switches. A programmable microprocessor controls passage of data through the various components in an iterative process.

Inventors

  • 👤 S. Brent Morris
  • 👤 Richard A. Wisniewski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 12:45
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/22; G06F7/24

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 211 words
Apparatus for sorting 2 v words, where v is an integer of value equal to or greater than k, comprising: a programmed processor; 2 k memory modules, where k is an integer of value greater than one, each comprising an input, an output, and means for storing 2 v-k words to be sorted; 2 k-1 means connected to the outputs of said memory modules for comparing a word in the Mth memory module with a word in the M+2 k-1th memory module, for 0≦M<2 k-1 , and for providing a first selected one of said words to a first output of said comparing means and for providing a second selected one of said words to a second output of said comparing means in response to first control signals from said processor; 2 k switches, each having an output coupled to the input of a separate one of said memory modules, and a plurality of inputs coupled to the outputs of selected ones of said comparing means, said switches responding to second control signals from said processor for effecting interconnections between the outputs of said comparing means and the inputs of said memory modules according to an algorithm being processed by said processor and predetermined by the values of v and k.
Claim 2
Dependent Claim 211 words
Apparatus for sorting 2 v words, where v is an integer of value equal to or greater than k, comprising: a programmed processor; 2 k memory modules, where k is an integer of value greater than one, each comprising an input, an output, and means for storing 2 v-k words to be sorted; 2 k-1 means connected to the outputs of said memory modules for comparing a word in the Mth memory module with a word in the M+2 k-1th memory module, for 0≦M<2 k-1 , and for providing a first selected one of said words to a first output of said comparing means and for providing a second selected one of said words to a second output of said comparing means in response to first control signals from said processor; 2 k switches, each having an output coupled to the input of a separate one of said memory modules, and a plurality of inputs coupled to the outputs of selected ones of said comparing means, said switches responding to second control signals from said processor for effecting interconnections between the outputs of said comparing means and the inputs of said memory modules according to an algorithm being processed by said processor and predetermined by the values of v and k.
Claim 3
Dependent Claim 13 words
The apparatus of claim 1, wherein said memory modules are serial shift registers.
Claim 4
Dependent Claim 20 words
The apparatus of claim 2, wherein said comparing means includes means for comparing the numerical values of two binary signals.

References Cited (Backward Citations)

US3636519A Cited
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US4128880A Cited
US4110837A Cited
US4302818A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-01-27 1989-07-29 1990-01-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-01-27 1993-07-29 1994-01-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-01-27 1997-07-29 1998-01-28 $7700.00 Window Closed / Lapsed

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