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US4567442A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for demodulating time-discrete frequency-modulated signals

Assignee: Siemens AG
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Filing: 1982-11-15
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Granted: 1986-01-28
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Expires: 2002-11-15
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Abstract

Abstract Method for demodulating time-discrete frequency-modulated signals. The method includes combining sequential equidistant samples of a signal to be demodulated for deducing the instantaneous frequency of the signal to be demodulated. The improvement includes dividing a first vector sum of samples forming a dividend by a second vector sum of samples forming a divisor. Each sample is a complex number represented by a vector. The vector sum of the dividend has a phase that is offset from the vector sum of the divisor by a phase angle equal to n times pi, wherein n is any integer. The division of the vector sums is advantageously performed by a ROM in which all the division results have been stored and which can be accessed by the divisor and the dividend for quickly obtaining the division result. Delay lines and summing circuits are used for combining the samples into the dividend and the divisor.

Inventors

  • 👤 Wolfgang Haussmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 10:17
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/006; H03D2200/00; H03D2200/0041; H03D2200/006; H03D2200/0062

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 112 words
Method for demodulating a frequency-modulated signal, wherein said frequency-modulated signal is sampled at equidistant discrete times and several first and second sampled values are added to form first and second vector sums respectively, whereby the selection of the first and second sample values is made under the condition that in a mathematical vector representation of these sample values the difference in phase between the first and second vector sum is n times pi wherein n is any integer, and wherein, for obtaining an output signal which is proportional to the instantaneous frequency of the signal in the region of zero crossings the first vector sum is divided by the second vector sum.
Claim 2
Dependent Claim 112 words
Method for demodulating a frequency-modulated signal, wherein said frequency-modulated signal is sampled at equidistant discrete times and several first and second sampled values are added to form first and second vector sums respectively, whereby the selection of the first and second sample values is made under the condition that in a mathematical vector representation of these sample values the difference in phase between the first and second vector sum is n times pi wherein n is any integer, and wherein, for obtaining an output signal which is proportional to the instantaneous frequency of the signal in the region of zero crossings the first vector sum is divided by the second vector sum.
Claim 3
Dependent Claim 88 words
Apparatus for demodulating a frequency-modulated signal wherein said frequency-modulated signal is sampled at equidistant discrete times, the apparatus comprising a series circuit to which the signal to be demodulated is applied, the series circuit, which includes delay elements, causing a constant phase-shift at first connection points for forming the first vector sum of sample values with first adders, and at second connection points for forming the second vector sum of sample values with a second adder, and a divider to which the outputs of both adders are conducted.
Claim 4
Dependent Claim 88 words
Apparatus for demodulating a frequency-modulated signal wherein said frequency-modulated signal is sampled at equidistant discrete times, the apparatus comprising a series circuit to which the signal to be demodulated is applied, the series circuit, which includes delay elements, causing a constant phase-shift at first connection points for forming the first vector sum of sample values with first adders, and at second connection points for forming the second vector sum of sample values with a second adder, and a divider to which the outputs of both adders are conducted.
Claim 5
Dependent Claim 30 words
Apparatus according to claim 2, wherein the divider comprises a read-only memory in which the division results are stored and which can be addressed by said first and second sums.
Claim 6
Dependent Claim 37 words
Apparatus according to claim 3, wherein the divider comprises a read-only memory in which the division results and the respective associated inverse cosine functions are stored and which can be addressed by said first and second sums.

References Cited (Backward Citations)

US4064408A Cited
US3944931A Cited
JPS5341162A Cited
JPS5527753A Cited
US4431916A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-01-27 1989-07-29 1990-01-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-01-27 1993-07-29 1994-01-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-01-27 1997-07-29 1998-01-28 $7700.00 Window Closed / Lapsed

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