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US4567329A Expired / Lapsed US ⏱️ 0.0 years remaining

Line circuit for network junctor

Assignee: S A T (SOCIETE ANONYME DE TELECOMMUNICATIONS) 41 RUE CANTAGREL 75624 PARIS CEDEX 13
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Filing: 1984-05-14
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Granted: 1986-01-28
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Expires: 2004-05-14
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Abstract

Abstract The present invention relates to a line circuit for network line junctor and more particularly to a dialling device. The dialling device according to the invention presents a high impedance for the direct current, the direct current being regulated about a predetermined threshold by means of an electronic choke, the regulation being controlled by a control circuit formed by an RC circuit with large time constant, by a diode and a capacitor. The invention is more particularly applicable to private switching equipment or to subscribers' terminals.

Inventors

  • 👤 Francois P. Bailly
  • 👤 Alain Bourgoin
  • 👤 Renato Israel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 22:04
CPC Classifications
H; H04; H04M; H04M1/00; H04M1/26; H04M1/30; H04M1/31; H04M1/312; H04M7/00; H04M7/0096

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 185 words
A line circuit for network junctor, comprising loop current interrupting means allowing dialling including regulating means for maintaining said loop current about a predetermined threshold and for presenting a high impedance for the telephone frequencies and a low impedance for the ringing currents, said regulating means comprising two transistors forming a Darlington assembly, the first transistor receiving on its base a loop opening or closure control pulse and being in series with a first resistor, the base of the second transistor and the collector of the first transistor being connected by a second resistor, and means for stabilizing the base voltage of said second transistor in order to raise the impedance of said regulating means in the telephone band, means for controlling said regulating means disposed in parallel on said first resistor and comprising a third transistor whose base is connected to the emitter of said first transistor and whose collector is connected to the base of said second transistor, the emitter of said third transistor being connected to said first resistor via a diode in order to improve the regulation for the low voltages.
Claim 2
Dependent Claim 185 words
A line circuit for network junctor, comprising loop current interrupting means allowing dialling including regulating means for maintaining said loop current about a predetermined threshold and for presenting a high impedance for the telephone frequencies and a low impedance for the ringing currents, said regulating means comprising two transistors forming a Darlington assembly, the first transistor receiving on its base a loop opening or closure control pulse and being in series with a first resistor, the base of the second transistor and the collector of the first transistor being connected by a second resistor, and means for stabilizing the base voltage of said second transistor in order to raise the impedance of said regulating means in the telephone band, means for controlling said regulating means disposed in parallel on said first resistor and comprising a third transistor whose base is connected to the emitter of said first transistor and whose collector is connected to the base of said second transistor, the emitter of said third transistor being connected to said first resistor via a diode in order to improve the regulation for the low voltages.
Claim 3
Dependent Claim 12 words
The circuit of claim 1, wherein said stabilization means comprise a capacitor.
Claim 4
Dependent Claim 46 words
The circuit of claim 1, wherein a low pass filter is interposed between the base of said third transistor and the emitter of said first transistor, said low pass filter having a large time constant and being operable to limit the regulation for the ringing currents.
Claim 5
Dependent Claim 32 words
The circuit of claim 1, wherein a Zener diode is disposed between the base of said second transistor and said first resistor in order to limit the excess voltages in open loop.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-01-27 1989-07-29 1990-01-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-01-27 1993-07-29 1994-01-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-01-27 1997-07-29 1998-01-28 $7700.00 Window Closed / Lapsed

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