Postage meter with power-failure resistant memory

Claim 1

In a postage meter incorporating a computer for the computation of available postage and a non-volatile electronically-programmable READ-ONLY memory (EEPROM) for the processing of data, a security system comprising: a shadow RAM formed as a composite memory unit including a first section of storage cells structured as a volatile random-access memory (RAM) coupled to said computer for use in computations performed by said microprocessor, said composite memory unit including a second memory section structured as a non-volatile array of storage cells arranged in correspondence with cells of the RAM, said composite memory unit further comprising means responsive to strobe signals for simultaneously transferring data between corresponding cells of said first and said second sections for permanent storage of data of said RAM during a power outage and includes means for initializing said RAM subsequent to a power outage; means for entering data into said shadow RAM and said EEPROM; a transfer circuit including a detector of input power, said transfer circuit including strobe means responsive to a signal of said detector for strobing said composite memory unit and said computer; and wherein said data is transferred from said volatile section to said non-volatile section at the beginning of a power outage upon a first said strobe signal, and, upon a second said strobe signal appearing at power restoration, the data is recalled from said non-volatile section within said shadow RAM; wherein said computer will write data to be preserved into the said EEPROM at the beginning of a power outage upon said first strobe signal, and, upon power restore to ON will read the data from the EEPROM into a further RAM contained in said computer and said computer compares said portion of data in said further RAM with the corresponding data being stored in said shadow RAM.