Frame synchronizing signal insertion system

Claim 1

A frame synchronizing signal insertion system at a transmitting end comprising a plurality of multiplex converting means each of which has time division means and multiplex gate means, said time division means comprising: timing clock generating means for receiving a frequency-dividing clock signal and for generating a first timing pulse signal which indicates a time at which a frequency-divided frame synchronizing signal is inserted and at least one second timing pulse signal which indicates a time at which an input digital signal is subject to time division; at least one samplng means for sampling the input digital signal in response to said at least one second timing pulse signal and for producing a time division signal; and frame pattern generating means for generating the frequency-divided frame synchronizing signal which has a predetermined pattern at the time indicated by the first timing pulse signal, said pattern including at least one pulse, said multiplex gate means receiving at least the frequency-divided frame synchronziing signal and the time division signal so as to produce a single multiplex signal in accordance with a given frame pattern wherein said multiplex gate means of said plurality of multiplex converting means include: a first multiplex gate which receives at least one corresponding time division signal and a corresponding frequency-divided frame synchronizing signal having a first frame pattern so as to produce a first composite multiplex signal which has the first frame pattern; and at least one second multiplex gate which receives at least one other corresponding time division signal, another corresponding frequency-divided frame synchronizing signal having a second frame pattern, and the first composite multiplex signal so as to produce a second composite multiplex signal having a composite frame pattern which is obtained by logic-ORing the frequency-divided frame synchronizing signals having the first and second frame patterns which differ from each other, said at least one second multiplex gate transmitting the second composite multiplex signal to the receiving end.