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US4560982A
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Driving circuit for liquid crystal electro-optical device
Assignee: Suwa Seikosha KK
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Filing: 1982-07-30
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Granted: 1985-12-24
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Expires: 2002-07-30
Abstract
Abstract A liquid crystal display device having non-linear characteristics provides uniform quality in a matrix display. In driving rows and columns of picture elements the duty ratio is substantially increased by shortening the time in which the picture element is selected and charged for lighting. Charging time is less than the half frame period divided by the number of columns to be driven in the half frame, and more rows of elements can be driven in the half frame period. The portion of time actually used for charging is designated as a fine scanning period. By modulating the voltage levels across the liquid crystal layer during fine scanning periods when the crystal element is not selected, effective voltage across the picture elements is maintained with little variation regardless of the number of picture elements driven on the same signal line. A gray scale display can be provided.
Inventors
- 👤 Tomio Sonehara
- 👤 Masami Murata
- 👤 Tadashi Ota
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 06:45
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/367
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
431 words
A driver circuit for a liquid crystal display having a liquid crystal panel with overlapping scanning and display electrodes forming a matrix of picture elements at the overlapping intersections of the scanning and display electrodes, the picture elements being defined by opposed portions of the scanning and display electrodes, each of the picture elements in the matrix being selected during a frame period during which each of the picture elements is caused to display an ON or OFF state as a result of a voltage difference between an opposed scanning electrode and an opposed display electrode, a scanning period being defined as the frame period divided by the number of scanning electrodes in the matrix, the driver circuit comprising: nonlinear driving means associated with each of the scanning and display electrodes for driving the scanning and display electrodes in a nonlinear manner; scanning electrode signal generating means for supplying a series of scanning signals to the respective nonlinear driving means for application to the scanning electrodes, each scanning signal for one of the scanning electrodes being at a selected level during a frame period for only a portion of one scanning period associated with one of the picture elements defined by the intersection of the one scanning electrode and the display electrodes, the scanning signal for the one scanning electrode being at a non-selected level during the remaining portion of said frame period; display electrode signal generating means for supplying a display signal train for each of the display electrodes to the respective nonlinear driving means, each display signal train corresponding to one display signal electrode being composed of a series of display signal train segments, each display signal train segment being a scanning period long and corresponding to the scanning period of a picture element formed by the overlapping intersection of the one display electrode and one of the scanning electrodes, each display signal train segment having a first portion at a selected level and a second portion at a non-selected level, the first portion of the signal train segment substantially coinciding with the selected level portion of the scanning signal for the picture element when the picture element is to display an ON state and the second portion of the signal train segment substantially coinciding with the selected level portion of the scanning signal for the picture element when the picture element is to display an OFF state; whereby the display of the picture element formed by a display electrode is substantially unaffected by the number of picture elements to display an ON state in a display signal train.
Claim 2
Dependent Claim
431 words
A driver circuit for a liquid crystal display having a liquid crystal panel with overlapping scanning and display electrodes forming a matrix of picture elements at the overlapping intersections of the scanning and display electrodes, the picture elements being defined by opposed portions of the scanning and display electrodes, each of the picture elements in the matrix being selected during a frame period during which each of the picture elements is caused to display an ON or OFF state as a result of a voltage difference between an opposed scanning electrode and an opposed display electrode, a scanning period being defined as the frame period divided by the number of scanning electrodes in the matrix, the driver circuit comprising: nonlinear driving means associated with each of the scanning and display electrodes for driving the scanning and display electrodes in a nonlinear manner; scanning electrode signal generating means for supplying a series of scanning signals to the respective nonlinear driving means for application to the scanning electrodes, each scanning signal for one of the scanning electrodes being at a selected level during a frame period for only a portion of one scanning period associated with one of the picture elements defined by the intersection of the one scanning electrode and the display electrodes, the scanning signal for the one scanning electrode being at a non-selected level during the remaining portion of said frame period; display electrode signal generating means for supplying a display signal train for each of the display electrodes to the respective nonlinear driving means, each display signal train corresponding to one display signal electrode being composed of a series of display signal train segments, each display signal train segment being a scanning period long and corresponding to the scanning period of a picture element formed by the overlapping intersection of the one display electrode and one of the scanning electrodes, each display signal train segment having a first portion at a selected level and a second portion at a non-selected level, the first portion of the signal train segment substantially coinciding with the selected level portion of the scanning signal for the picture element when the picture element is to display an ON state and the second portion of the signal train segment substantially coinciding with the selected level portion of the scanning signal for the picture element when the picture element is to display an OFF state; whereby the display of the picture element formed by a display electrode is substantially unaffected by the number of picture elements to display an ON state in a display signal train.
Claim 3
Dependent Claim
20 words
The driver circuit of claim 1 wherein the non-linear driving means is a series of metal-insulator-metal devices having non-linear characteristics.
Claim 4
Dependent Claim
35 words
The driver circuit of claim 1 wherein the non-linear driving means is a series of varistors and diodes connected in series in the reverse directions utilizing the avalanche breakdown voltage in junctions, having non-linear characteristics.
Claim 5
Dependent Claim
18 words
The driver circuit of claim 1 wherein the nonlinear driving means is a series of active switching elements.
Claim 6
Dependent Claim
29 words
The driver circuit of claim 1 wherein the portion of one scanning period at which the scanning electrodes signal is at the selected level is a fine scanning period.
Claim 7
Dependent Claim
17 words
The driver circuit of claim 5 wherein the fine scanning period is one-half of a scanning period.
Claim 8
Dependent Claim
32 words
The driver circuit of claim 6 wherein the first portion and the second portion of each of the display signal train segments are substantially equal in duration to the fine scanning period.
Claim 9
Dependent Claim
19 words
The driver circuit of claim 5 wherein the fine scanning period is less than one-half of the scanning period.
Claim 10
Dependent Claim
24 words
The driver circuit of claim 5 wherein each first portion of the display signal train segment is substantially equal to the fine scanning period.
Claim 11
Dependent Claim
19 words
The driver circuit of claim 5 wherein each scanning period is composed of at least two fine scanning periods.
Claim 12
Dependent Claim
19 words
The driver circuit of claim 1 wherein the display signal train includes a plurality of display signal train segments.
Claim 13
Dependent Claim
22 words
The driver circuit of claim 11 where the number of display signal train segments is equal to the number of scanning electrodes.
Claim 14
Dependent Claim
19 words
The driver circuit of claim 1 wherein the display signal train is equal in length to the frame period.
Claim 15
Dependent Claim
35 words
The driver circuit of claim 13 wherein the scanning electrode signal generating means and display electrode signal generating means further generate scanning signals and display signal train of inverted polarity during a second frame period.
Claim 16
Dependent Claim
22 words
The driver circuit of claim 1 wherein the duration of the first portion is equal to the duration of the second portion.
Claim 17
Dependent Claim
25 words
The driver circuit of claim 15 wherein the duration of the first portion and the duration of the second portion together equal the scanning period.
Claim 18
Dependent Claim
17 words
The driver circuit of claim 15 wherein each display signal train segment further includes a pause portion.
Claim 19
Dependent Claim
25 words
The driver circuit of claim 1 wherein the duration of the first portion and the duration of the second portion together equal the scanning period.
Claim 20
Dependent Claim
17 words
The driver circuit of claim 1 wherein each display signal train segment further includes a pause period.
Claim 21
Dependent Claim
28 words
The driver circuit of claim 1 wherein the selected levels of the scanning signals and the display signal trains are variable so that a gray scale is displayed.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-12-23 | 1989-06-24 | 1989-12-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-12-23 | 1993-06-24 | 1993-12-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-12-23 | 1997-06-24 | 1997-12-24 | $7700.00 | Window Closed / Lapsed |