US4560921A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Comparator circuit with built in reference
Assignee: National Semiconductor Corp
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Filing: 1984-06-15
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Granted: 1985-12-24
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Expires: 2004-06-15
Abstract
Abstract A comparator circuit is disclosed wherein the input terminals are provided with a predetermined reference potential. Thus, in the case where only one input is driven the other input is biased at close to the reference. In the application of the circuit it is not necessary to provide an external package pin for reference potential.
Inventors
- 👤 Mineo Yamatake
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:44
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F3/45484; H03F3/45547; H03F3/45551; H03F3/45556; H03K; H03K5/00; H03K5/22; H03K5/24; H03K5/2409; H03K5/2418
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
78 words
A comparator circuit having a pair of differential signal input terminals, a single-ended output and an input biasing circuit, said input bias circuit comprising: current sink means coupled to said signal input terminals; current source means coupled to said signal input terminals; and means, responsive to the common mode potential at said signal input terminals, for controlling one of said current sink means and said current source means, to produce a reference bias at said signal input terminals.
Claim 2
Dependent Claim
78 words
A comparator circuit having a pair of differential signal input terminals, a single-ended output and an input biasing circuit, said input bias circuit comprising: current sink means coupled to said signal input terminals; current source means coupled to said signal input terminals; and means, responsive to the common mode potential at said signal input terminals, for controlling one of said current sink means and said current source means, to produce a reference bias at said signal input terminals.
Claim 3
Dependent Claim
58 words
The comparator circuit of claim 1 wherein said means for controlling comprise: a control operational amplifier having a first input coupled to a reference potential, a second input coupled equally to said pair of differential signal input terminals, and an output coupled to control the conduction of one of said current sink means and said current source means.
Claim 4
Dependent Claim
42 words
The comparator of claim 2 wherein said current source means comprise a pair of transistors having their controlled conduction paths coupled to supply current to said signal input terminals and their control electrodes coupled to said output of said control operational amplifier.
Claim 5
Dependent Claim
42 words
The comparator of claim 2 wherein said current sink means comprise a pair of transistors having their controlled conduction paths coupled to sink current from said signal input terminals and their control electrodes coupled to said output of said control operational amplifier.
Claim 6
Dependent Claim
41 words
The comparator of claim 2 wherein said current source means comprise a pair of PNP transistors having their collectors coupled to said pair of differential signal input terminals and their bases coupled to said output terminal of said control operational amplifier.
Claim 7
Dependent Claim
53 words
The comparator of claim 2 wherein said current source means comprise a single NPN transistor having its emitter coupled to a matched pair of resistors which act to couple said emitter equally to said pair of differential signal input terminals, and its base coupled to said output terminal of said control operational amplifier.
Claim 8
Dependent Claim
41 words
The comparator of claim 2 wherein said current source means comprise a pair of NPN transistors having their collectors coupled to said pair of differential signal input terminals and their bases coupled to said output terminal of said control operational amplifier.
Claim 9
Dependent Claim
41 words
The comparator of claim 2 wherein said current sink means comprise a pair of NPN transistors having their collectors coupled to said pair of differential signal input terminals and their bases coupled to said output terminal of said control operational amplifier.
Claim 10
Dependent Claim
41 words
The comparator of claim 2 wherein said current sink means comprise a pair of PNP transistors having their emitters coupled to said pair of differential signal input terminals and their bases coupled to said output terminal of said control operational amplifier.
Claim 11
Dependent Claim
49 words
The comparator of claim 2 wherein said current sink means comprise a single NPN transistor having its collector coupled equally to said pair of differential signal input terminals, by way of a matched pair of resistors, and its base coupled to said output terminal of said control operational amplifier.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-12-23 | 1989-06-24 | 1989-12-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-12-23 | 1993-06-24 | 1993-12-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-12-23 | 1997-06-24 | 1997-12-24 | $7700.00 | Window Closed / Lapsed |