US4554507A
Expired / Lapsed
US
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Arrangement for testing the operability of a semiconductive device
Assignee: Siemens Mobility Ltd
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Filing: 1982-11-08
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Granted: 1985-11-19
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Expires: 2002-11-08
Abstract
Abstract An arrangement for checking the integrity and operability of a semiconductive device including a control circuit for injecting test signals into a normal control signal to induce a momentary change of the operating condition of the semiconductive device, a sensing circuit connected in parallel with the semiconductive device sensitive to an induced change to produce an output indicating the induced change, and a correlation circuit operative to correlate the test pulses with the sensed response which is arranged to carry out predetermined action in the event that the correlation circuit determines a state of inoperability of the semiconductive device.
Inventors
- 👤 Christopher R. Brown
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 03:06
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/26; G01R31/2607; G01R31/263
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
94 words
Apparatus for testing the operability of a semiconductive device comprising, means for injecting test pulses into a normal control signal to induce a momentary change of the operating state of said semiconductive device, sensing means connected in parallel with said semiconductive device sensitive to the induced change to produce a binary output sequence indicating the induced change, and correlation means operative to correlate the test pulses with the sensed response which is arranged to carry out a predetermined action in event that said correlation means determines a state of inoperability of said semiconductive device.
Claim 2
Dependent Claim
94 words
Apparatus for testing the operability of a semiconductive device comprising, means for injecting test pulses into a normal control signal to induce a momentary change of the operating state of said semiconductive device, sensing means connected in parallel with said semiconductive device sensitive to the induced change to produce a binary output sequence indicating the induced change, and correlation means operative to correlate the test pulses with the sensed response which is arranged to carry out a predetermined action in event that said correlation means determines a state of inoperability of said semiconductive device.
Claim 3
Dependent Claim
35 words
The apparatus as defined in claim 1, wherein said sensing means includes a light emitting diode which is connected in series with a current limiting resistor, both of which are connected across said semiconductive device.
Claim 4
Dependent Claim
26 words
The apparatus as defined in claim 2, wherein said correlation means includes a photoresponsive means which is responsive to the condition of said light emitting diode.
Claim 5
Dependent Claim
21 words
The apparatus as defined in claim 1, wherein said semiconductive device includes a switching element which is turned on and off.
Claim 6
Dependent Claim
18 words
The apparatus as defined in claim 4, wherein said switching element is connected in series with a transformer.
Claim 7
Dependent Claim
14 words
The apparatus as defined in claim 1, wherein said semiconductive device includes a TRIAC.
Claim 8
Dependent Claim
20 words
The apparatus as defined in claim 1, wherein said semiconductive device is connected in series with an a.c. voltage source.
Claim 9
Dependent Claim
33 words
The apparatus as defined in claim 2, said sensing means includes a current limiting resistor in series with said light emitting diode and an additional resistor in parallel with said light emitting diode.
Claim 10
Dependent Claim
28 words
The apparatus as defined in claim 1, wherein said sensing means includes a pair of light emitting diodes and said correlation means includes a pair of photoresponsive transistors.
Claim 11
Dependent Claim
20 words
The apparatus as defined in claim 1, wherein the secondary winding of said transformer is connected to a control device.
Claim 12
Dependent Claim
95 words
A vital circuit arrangement comprising, a pair of switching elements, means for generating and applying control signals to control terminals of the pair of switching elements, a transformer having its primary winding connected in series with said switching elements across a source of supply voltage, a pair of optical couplers connected to each of said switching elements, said transformer having a secondary winding coupled to a load which is energized when said switching elements are rendered conductive, and means to introduce test pulses into said switching elements to check the operability of said switching elements.
Claim 13
Dependent Claim
95 words
A vital circuit arrangement comprising, a pair of switching elements, means for generating and applying control signals to control terminals of the pair of switching elements, a transformer having its primary winding connected in series with said switching elements across a source of supply voltage, a pair of optical couplers connected to each of said switching elements, said transformer having a secondary winding coupled to a load which is energized when said switching elements are rendered conductive, and means to introduce test pulses into said switching elements to check the operability of said switching elements.
Claim 14
Dependent Claim
17 words
The vital circuit arrangement as defined in claim 11, wherein each of said switch elements is TRIAC.
Claim 15
Dependent Claim
24 words
The vital circuit arrangement as defined in claim 11, wherein each of said optical couplers includes a light emitting diode and a photoresponsive transistor.
Claim 16
Dependent Claim
21 words
The vital circuit arrangement as defined in claim 11, wherein a voltage divider is connected to each of said optical couplers.
Claim 17
Dependent Claim
23 words
The vital circuit arrangement as defined in claim 12, wherein said test pulses are periodically connected to the gate electrodes of said TRIACS.
Claim 18
Dependent Claim
24 words
The vital circuit arrangement as defined in claim 1, wherein each of said optical couplers includes a pair of reversely poled light emitting diodes.
Claim 19
Dependent Claim
18 words
The vital circuit arrangement as defined in claim 14, wherein said voltage divider includes a pair of resistors.
Claim 20
Dependent Claim
101 words
A circuit arrangement for testing the operability of electrical elements comprising, a first and a second TRIAC serially connected to the primary winding of a transformer, the secondary winding of said transformer is connected to a load which is energized when said first and second TRIACS are rendered conductive, a pair of reversely poled light emitting diodes connected across said first and second TRIACS, a pair of photoresponsive transistors optically coupled to a respective one of said pair of reversely poled diodes, and test pulses periodically applied to the gate electrodes of said first and second TRIACS to test their operability.
Claim 21
Dependent Claim
101 words
A circuit arrangement for testing the operability of electrical elements comprising, a first and a second TRIAC serially connected to the primary winding of a transformer, the secondary winding of said transformer is connected to a load which is energized when said first and second TRIACS are rendered conductive, a pair of reversely poled light emitting diodes connected across said first and second TRIACS, a pair of photoresponsive transistors optically coupled to a respective one of said pair of reversely poled diodes, and test pulses periodically applied to the gate electrodes of said first and second TRIACS to test their operability.
Claim 22
Dependent Claim
26 words
The circuit arrangement as defined in claim 18, wherein each of said pair of reversely poled diodes are connected across a resistor of a voltage divider.
Claim 23
Dependent Claim
22 words
The circuit arrangement as defined in claim 18, wherein a filter capacitor and a surge suppressor is connected across said secondary winding.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-11-18 | 1989-05-20 | 1989-11-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-11-18 | 1993-05-20 | 1993-11-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-11-18 | 1997-05-20 | 1997-11-19 | $7700.00 | Window Closed / Lapsed |