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US4554048A Expired / Lapsed US ⏱️ 0.0 years remaining

Anistropic etching

Assignee: Nokia Bell Labs
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Filing: 1984-10-17
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Granted: 1985-11-19
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Expires: 2004-10-17
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Abstract

Abstract The specification describes a process for treating patterned VLSI lithographic masks to retain their shape during processing of VLSI wafers. The process avoids the common postbake treatment which tends to cause sagging of the sidewalls of the mask. Retention of vertical sidewalls on the mask edges has been found important for producing vertical sidewalls in layers that are being anisotropically etched.

Inventors

  • 👤 Ajit S. Manocha

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 03:52
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/268; H10P50/69; H10P50/691; H10P50/693; H10P50/695; H10P50/73

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 86 words
A lithographic process comprising, applying a resist material to a substrate, patterning the resist by a lithographic patterning step, placing the substrate in a dry etching apparatus, exposing the substrate to a reactive gas plasma at an electric power level below the level at which effective etching of the substrate occurs, and continuing that exposure for a period sufficient to harden the patterened resist, and exposing the substrate, without interruption, to the same plasma adjusted at a power level sufficient to effect etching of the substrate.
Claim 2
Dependent Claim 86 words
A lithographic process comprising, applying a resist material to a substrate, patterning the resist by a lithographic patterning step, placing the substrate in a dry etching apparatus, exposing the substrate to a reactive gas plasma at an electric power level below the level at which effective etching of the substrate occurs, and continuing that exposure for a period sufficient to harden the patterened resist, and exposing the substrate, without interruption, to the same plasma adjusted at a power level sufficient to effect etching of the substrate.
Claim 3
Dependent Claim 24 words
The process of claim 1 in which the substrate is silicon coated with multiple layers and the layer being etched is a metal silicide.
Claim 4
Dependent Claim 20 words
The process of claim 1 in which the reactive gas plasma is chosen to produce anisotropic etching of the substrate.
Claim 5
Dependent Claim 26 words
The process of claim 1 in which the substrate is placed in the etching apparatus after patterning of the resist and without any intervening baking step.
Claim 6
Dependent Claim 12 words
The process of claim 4 in which the resist is a photoresist.

References Cited (Backward Citations)

US4436584A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-11-18 1989-05-20 1989-11-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-11-18 1993-05-20 1993-11-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-11-18 1997-05-20 1997-11-19 $7700.00 Window Closed / Lapsed

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