← Back to Patent Explorer
US4553102A Expired / Lapsed US ⏱️ 0.0 years remaining

Multilevel amplitude modulation demodulator with DC drift compensation

Assignee: NEC Corp
•
Filing: 1984-07-23
•
Granted: 1985-11-12
•
Expires: 2004-07-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Multilevel baseband signals are applied to a full-wave rectifying section which produces first and second outputs. These outputs are applied to an analog-to-digital converting means which produces a plurality of recovered binary digital signals and an error signal. A controller is supplied with at least one recovered binary digital signal and the error signal, and produces two control signals which are fed to the full-wave rectifying section to compensate (a) first DC-drifts superimposed on the multilevel baseband signal and (b) second DC-drifts generated within the full-wave rectifying section itself.

Inventors

  • 👤 Yasuharu Yoshida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 21:24
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/06; H04L25/067; H04L27/00; H04L27/32; H04L27/34; H04L27/38; H04L27/3809

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 142 words
A demodulator for a multilevel amplitude modulation system, said demodulator comprising a discriminator which receives demodulated multilevel baseband signals and recovers a plurality of binary digital signals according to a plurality of discriminating levels, said discriminator including: a full-wave rectifying section which receives said multilevel baseband signals and produces first and second outputs, said first output being controlled by a first control signal with respect to the DC components thereof, said second output being full-wave rectified and controlled by a second control signal with respect to the DC components thereof; an analog-to-digital converting means which receives said first and second outputs and produces the recovered binary digital signals and an error signal; and a controller which receives at least one of the recovered binary digital signals and said error signal and which produces said first and second control signals after logic operations.
Claim 2
Dependent Claim 142 words
A demodulator for a multilevel amplitude modulation system, said demodulator comprising a discriminator which receives demodulated multilevel baseband signals and recovers a plurality of binary digital signals according to a plurality of discriminating levels, said discriminator including: a full-wave rectifying section which receives said multilevel baseband signals and produces first and second outputs, said first output being controlled by a first control signal with respect to the DC components thereof, said second output being full-wave rectified and controlled by a second control signal with respect to the DC components thereof; an analog-to-digital converting means which receives said first and second outputs and produces the recovered binary digital signals and an error signal; and a controller which receives at least one of the recovered binary digital signals and said error signal and which produces said first and second control signals after logic operations.
Claim 3
Dependent Claim 22 words
A demodulator as claimed in claim 1, further comprising at least one limiter provided between said controller and said full-wave rectifying section.
Claim 4
Dependent Claim 92 words
A demodulator as claimed in claim 1, wherein said full-wave rectifying section comprises: a first DC control circuit which receives said multilevel baseband signal and which is controlled by said first conrol signal with respect to the DC components thereof; a full-wave rectifier coupled to the output of said first DC control circuit; a second DC control circuit which is coupled to said full-wave rectifier and which is controlled by said second control signal with respect to the DC components thereof, said first output being derived from said first DC control circuit.
Claim 5
Dependent Claim 20 words
A demodulator as claimed in claim 3, wherein each of said first and second DC control circuits is a subtracter.
Claim 6
Dependent Claim 20 words
A demodulator as claimed in claim 3, wherein each of said first and second DC control circuits is an adder.
Claim 7
Dependent Claim 133 words
A demodulator as claimed in claim 1, wherein said full-wave rectifying section comprises: a DC control circuit which receives said multilevel baseband signal and which is controlled by said first control signal with respect to the DC components thereof; a non-inverting amplifier coupled to the output of said DC control circuit; an inverting amplifier coupled to said non-inverting amplifier in parallel and being coupled to the output of said first DC control circuit; a first half-wave rectifier coupled to the output of said non-inverting amplifier; a second half-wave rectifier coupled to the output of said inverting amplifier, said first and second half-wave rectifiers operating as a full-wave rectifier in combination and producing said second output; wherein the output signals of said non-inverting and inverting amplifiers being controlled simultaneously by said second control signal.
Claim 8
Dependent Claim 18 words
A demodultor as claimed in claim 6, wherein said first output is derived from said DC control circuit.
Claim 9
Dependent Claim 20 words
A demodulator as claimed in claim 6, wherein said first output is derived from the output of said non-inverting amplifier.
Claim 10
Dependent Claim 95 words
A demodulator as claimed in claim 1, wherein said full-wave rectifying section comprises: a non-inverting amplifier being adapted to receive said multiple baseband signals; an inverting amplifier being adapted to receive said multiple baseband signals; a first half-wave rectifier coupled to the output of said non-inverting amplifier; a second half-wave rectifier coupled to the output of said inverting amplifier, said first and second half-wave rectifiers operating as a full-wave rectifier in combination and producing said second output; wherein the output signals of said non-inverting and inverting amplifiers being controlled simultaneously by said second control signal.
Claim 11
Dependent Claim 58 words
A demodulator as claimed in claim 1, wherein said controller comprises: a logic circuit for receiving said recovered binary digital signals and said error signal; two multivibrators which are controlled by the outputs of said logic circuit; and two low-pass filters which receive the outputs of said two multivibrators respectively, and producing said first and second control signals.
Claim 12
Dependent Claim 24 words
A demodulator as claimed in claim 10, further comprising two limiters which are provided between said two low-pass filters and said full-wave rectifying section.

References Cited (Backward Citations)

US3688205A Cited
US4071829A Cited
US4250458A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-11-11 1989-05-13 1989-11-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-11-11 1993-05-13 1993-11-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-11-11 1997-05-13 1997-11-12 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag