Abstract The present invention features an ADPCM decoder of the instantaneous companding type which comprises two memory circuits (each preferably PROM). The first memory contains a plurality of differential values and the second a plurality of step size control codes. The memories receives ADPCM input codes which function as address signals. The memories are connected through an adder and a shift register feedback connected with the adder. The first memory receives two inputs, one of which is an ADPCM input code and the other is an input consisting of the sum of the current output of the second memory plus the previous value outputted thereby. The first memory produces a differential value on the basis of the two inputs applied.
Inventors
👤 Katsunobu Fushikida
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-30 11:09
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/04; H03M3/042
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
160 words
An adaptive differential PCM decoder for receiving adaptive differential PCM input codes and for reproducing a replica of an original waveform, said decoder comprising: a first multiword memory in which a plurality of differential values is stored, said first memory receiving said input codes and step size codes; a second multiword memory in which a plurality of step size control codes is stored, said second memory receiving said input codes and outputting the step size control code selected on the basis of the received input code; a circuit interconnecting said first and second memories, said circuit including an adder which adds a signal which is indicative of the current output of the second memory plus a previous output of the adder, said first memory outputting a differential value selected on the basis of said input codes and the output of said adder; and a waveform reproducing circuit for receiving the output of said first memory and for reproducing the replica.
Claim 2
Dependent Claim
160 words
An adaptive differential PCM decoder for receiving adaptive differential PCM input codes and for reproducing a replica of an original waveform, said decoder comprising: a first multiword memory in which a plurality of differential values is stored, said first memory receiving said input codes and step size codes; a second multiword memory in which a plurality of step size control codes is stored, said second memory receiving said input codes and outputting the step size control code selected on the basis of the received input code; a circuit interconnecting said first and second memories, said circuit including an adder which adds a signal which is indicative of the current output of the second memory plus a previous output of the adder, said first memory outputting a differential value selected on the basis of said input codes and the output of said adder; and a waveform reproducing circuit for receiving the output of said first memory and for reproducing the replica.