Semiconductor device and technique which employs normally unused interconnection elements as resistor circuit elements

Claim 2

In a semiconductor device having a semiconductor body with a given conductivity type, a plurality of active cells formed in the body to define circuit elements, a plurality of wiring cells formed in the body, and means for interconnecting selected ones of the active cells to one another through selected ones of the wiring cells to define a circuit configuration, the improvement comprising: a plurality of resistor elements, each resistor element being constructed by electrically interconnecting at least a portion of at least one of the non-selected wiring cells with at least a portion of at least another one of said non-selected wiring cells to form a resistor element separate from the selected ones of said wiring cells, each of said wiring cells having a specific resistivity; and means for interconnecting said plurality of resistor elements to said active cells as separate resistive circuit elements of said circuit configuration.

Claim 3

The semiconductor device of claim 1 wherein at least one resistor element is constructed as the interconnection of at least two non-selected wiring cells in electrical parallel.

Claim 4

The semiconductor device of claim 1 wherein at least one resistor element is constructed as the connection of two non-selected wiring cells in electrical series.

Claim 5

The semiconductor device of claim 1 wherein at least one resistor element is constructed by the interconnection of a plurality of wiring cells interconnected to form resistors defining a potentiometer as a circuit element.

Claim 6

The semiconductor device of claim 4 wherein the resistances of the resistors defining the potentiometer are selected to substantially define a geometric series of resistance values.

Claim 7

The semiconductor device of claim 1 wherein said selected ones of said active cells connected through said selected ones of said wiring cells are connected to define at least one amplifier and a plurality of switches as part of said circuit configuration, said plurality of resistor elements are connected to define feedback resistors as circuit elements, and said switches are coupled to respective ones of said plurality of feedback resistors and to said at least one amplifier to define a plurality of switch circuits which can selectively couple each of said feedback resistors to form a feedback path for the said at least one amplifier.

Claim 8

The semiconductor device of claim 6 wherein the resistances of said feedback resistors are selected to define substantially a geometric series of resistance values.

Claim 9

The semiconductor device of claim 1 wherein said selected ones of said active cells connected through said selected ones of said wiring cells are connected to define at least a plurality of amplifiers and a plurality of switches as part of said circuit configuration, said plurality of resistor elements are connected to define a plurality of feedback resistors as circuit elements, and said switches are coupled to respective ones of said plurality of feedback resistors and said plurality of amplifiers to define a plurality of switch circuits which can each selectively couple one of said feedback resistors to form a feedback path for one of said plurality of amplifiers.

Claim 10

The semiconductor device of claim 8 wherein the resistances of the feedback resistors are selected to substantially define a geometric series of resistance values.

Claim 11

The semiconductor device of claim 1 wherein at least some of said plurality of active cells include MOS transistors.

Claim 12

The semiconductor device of claim 1 wherein at least some said active cells contain bipolar transistors.

Claim 13

The semiconductor device of claim 1 wherein said plurality of active calls and said plurality of wiring cells are constructed to define a gate array system.

Claim 14

In a method of manufacturing a semiconductor device having the steps of providing a semiconductor body having a given conductivity type, forming a plurality of active cells in the semiconductor body to define circuit elements, forming a plurality of wiring cells in the semiconductor body, and connecting selected one of the active cells to one another through selected ones of the wiring cells to define a circuit configuration, the improvement comprising: forming a plurality of resistor elements such that each resistor element is constructed by electrically interconnecting at least a portion of at least one of the non-selected wiring cells with at least a portion of at least another one of said non-selected wiring cells to form a resistor element separate from the selected ones of said wiring cells, each of said wiring cells having a specific resistivity; and connecting said plurality of resistor elements to said active cells as separate resistive circuit elements of said circuit configuration.

Claim 15

In a method of manufacturing a semiconductor device having the steps of providing a semiconductor body having a given conductivity type, forming a plurality of active cells in the semiconductor body to define circuit elements, forming a plurality of wiring cells in the semiconductor body, and connecting selected one of the active cells to one another through selected ones of the wiring cells to define a circuit configuration, the improvement comprising: forming a plurality of resistor elements such that each resistor element is constructed by electrically interconnecting at least a portion of at least one of the non-selected wiring cells with at least a portion of at least another one of said non-selected wiring cells to form a resistor element separate from the selected ones of said wiring cells, each of said wiring cells having a specific resistivity; and connecting said plurality of resistor elements to said active cells as separate resistive circuit elements of said circuit configuration.

Claim 16

The method of claim 13 wherein the step of forming said plurality of resistor elements includes forming at least one resistor element by connecting at least two wiring cells in electrical parallel.

Claim 17

The method of claim 13 wherein the step of forming said plurality of resistor elements includes forming at least one resistor element by connecting at least two wiring cells in electrical series.