US4547685A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sense amplifier circuit for semiconductor memories
Assignee: Advanced Micro Devices Inc
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Filing: 1983-10-21
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Granted: 1985-10-15
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Expires: 2003-10-21
Abstract
Abstract An improved sense amplifier circuit for sensing information in the cells of a semiconductor memory device is presented. The sense amplifier circuit as presented includes AC-coupled positive feedback means to provide a reduction in sensing delay time, and thus, faster memory access time.
Inventors
- 👤 Thomas S. W. Wong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 23:14
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; G; G11; G11C; G11C7/00; G11C7/06; G11C7/062
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
263 words
An improved sense amplifier circuit for sensing a first sense current and a second sense current to thereby sense information in the cells of an semiconductor random access memory array, comprising: a first transistor having a collector terminal coupled through a first resistance element to a first voltage supply means, an emitter terminal coupled through a current source to a second voltage supply means, and a base terminal coupled to receive the first sense current; a second transistor having a collector terminal coupled through a second resistance element to said first voltage supply means, an emitter terminal coupled to the emitter terminal of said first transistor, and a base terminal coupled to receive the second sense current; a first means for biasing the base of said first transistor, said first means for biasing including a first diode element coupled to said first voltage supply means and further coupled at the base terminal of said first transistor to a first bias current source; a second means for biasing the base of said second transistor said second means for biasing, including a second diode element coupled to said first voltage supply means and further coupled at the base terminal of said second transistor to a second bias current source; and an AC-coupled positive feedback circuit which couples the collector terminal of said second transistor to the base terminal of said first transistor and which further couples the collector terminal of said first transistor to the base terminal of said second transistor to apply a portion of the respective voltage signals on said respective collector terminals.
Claim 2
Dependent Claim
263 words
An improved sense amplifier circuit for sensing a first sense current and a second sense current to thereby sense information in the cells of an semiconductor random access memory array, comprising: a first transistor having a collector terminal coupled through a first resistance element to a first voltage supply means, an emitter terminal coupled through a current source to a second voltage supply means, and a base terminal coupled to receive the first sense current; a second transistor having a collector terminal coupled through a second resistance element to said first voltage supply means, an emitter terminal coupled to the emitter terminal of said first transistor, and a base terminal coupled to receive the second sense current; a first means for biasing the base of said first transistor, said first means for biasing including a first diode element coupled to said first voltage supply means and further coupled at the base terminal of said first transistor to a first bias current source; a second means for biasing the base of said second transistor said second means for biasing, including a second diode element coupled to said first voltage supply means and further coupled at the base terminal of said second transistor to a second bias current source; and an AC-coupled positive feedback circuit which couples the collector terminal of said second transistor to the base terminal of said first transistor and which further couples the collector terminal of said first transistor to the base terminal of said second transistor to apply a portion of the respective voltage signals on said respective collector terminals.
Claim 3
Dependent Claim
56 words
The circuit of claim 1 further characterized by said AC-coupled positive feedback circuit means including: a first capacitor coupled between the base terminal of said first transistor and the collector terminal of said second transistor; and a second capacitor coupled between the base terminal of said second transistor and the collector terminal of said first transistor.
Claim 4
Dependent Claim
109 words
The circuit of claim 2 further including: a first sense current line capacitance coupled to the base terminal of said first transistor; and, a second sense current line capacitance coupled to the base terminal of said second transistor, the first capacitor and the first sense current line capacitance forming a voltage divider for providing a feedback signal from the collector terminal of said second transistor to the base terminal of said first transistor and the second capacitor and the second sense current line capacitor forming a voltage divider for providing a feedback signal from the collector terminal of said first transistor to the base terminal of said second transistor.
Claim 5
Dependent Claim
177 words
An improved sense amplifier circuit disposed for sensing information in the cells of a random access semiconductor memory comprising: a first transistor having a collector terminal coupled through a first resistance element to a first voltage supply means, an emitter terminal coupled to a first sense current source, and a base terminal coupled to a second voltage supply means; a second transistor having a collector terminal coupled through a second resistance element to said first voltage supply means, an emitter terminal coupled to a second current source, and a base terminal coupled to said second voltage supply means, and further coupled to the base terminal of said first transistor; and an AC coupled positive feedback circuit coupling the collector terminal of said first transistor to the emitter terminal of said first transistor, and further coupling the collector terminal of said second transistor to the emitter terminal of said second transistor, said collector terminal of said first transistor and said collector terminal of said second transistor comprising, respectively, first and second output terminals of said sense amplifier circuit.
Claim 6
Dependent Claim
177 words
An improved sense amplifier circuit disposed for sensing information in the cells of a random access semiconductor memory comprising: a first transistor having a collector terminal coupled through a first resistance element to a first voltage supply means, an emitter terminal coupled to a first sense current source, and a base terminal coupled to a second voltage supply means; a second transistor having a collector terminal coupled through a second resistance element to said first voltage supply means, an emitter terminal coupled to a second current source, and a base terminal coupled to said second voltage supply means, and further coupled to the base terminal of said first transistor; and an AC coupled positive feedback circuit coupling the collector terminal of said first transistor to the emitter terminal of said first transistor, and further coupling the collector terminal of said second transistor to the emitter terminal of said second transistor, said collector terminal of said first transistor and said collector terminal of said second transistor comprising, respectively, first and second output terminals of said sense amplifier circuit.
Claim 7
Dependent Claim
56 words
The circuit of claim 4 further characterized by said AC-coupled positive feedback circuit means including: a first capacitor coupled between the collector terminal of said first transistor and the emitter terminal of said first transistor; and a second capacitor coupled between the collector terminal of said second transistor and the emitter terminal of said second transistor.
Claim 8
Dependent Claim
36 words
The circuit of claim 4, further including: a first bias current source coupled to the emitter terminal of said first transistor; and a second bias current source coupled to the emitter terminal of said second transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-10-14 | 1989-04-15 | 1989-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-10-14 | 1993-04-15 | 1993-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-10-14 | 1997-04-15 | 1997-10-15 | $7700.00 | Window Closed / Lapsed |