Synchronization system for a closed-loop multiplex communication network

Claim 1

A synchronization system for a communication system wherein a plurality of units (SM-1, SM-N) are connected in series by means of a unidirectional closed-loop link (10) operating in the time-division multiplex mode with recurrent frames of equal duration each of which is divided into a plurality of equal time intervals during which said closed-loop link (10) carries a plurality of time-division channels, said synchronization system including loop control means (11) inserted in said closed-loop link (10) and being characterized in that it comprises: a random access memory (173), input means (170) for applying the contents of the closed-loop link upstream of said loop control means (11) to the data input of said memory (173), output means (176) for applying the output data from said memory to said closed-loop means downstream of said loop control means, first counter means (IAC) for sequentially generating input addresses under control of an incoming timing signal (2MCR) and for supplying during each of said time intervals an input address specifying the location of said memory (173) where the output from said input means is to be stored, second counter means (OAC) for sequentially generating output addresses under control of an outgoing timing signal (-2MCT) and for supplying during each of said time intervals an output address specifying the location of said memory (173) that is to be read out, means (-4MCT, 182) for controlling read operations to be performed in said memory (173) during a fixed readout period (READ) within each of said time intervals, means (183, 186) for selectively controlling write operations to be performed in said memory (173) during either of two fixed write periods (WA and WB) within each of said time intervals dependent upon the delay of the incoming timing signal relative to the outgoing timing signal, a closed-loop timing link (15) closed by a master timing device (13) that sends said outgoing timing signal (2MCT) thereon and receives therefrom said incoming timing signal (2MCR), and a plurality of slave timing devices (18) inserted in said closed-loop timing link to regenerate the timing signal traveling thereon, with each of said slave timing devices deriving from the regenerated timing signal a timing signal that exhibits a higher frequency (16 MHz) than said regenerated timing signal and is applied to a group (SU-1, SU-M) comprising at least one unit.