US3681759A
Expired / Lapsed
US
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Data loop synchronizing apparatus
Assignee: Collins Radio Co
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Filing: 1970-08-06
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Granted: 1972-08-01
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Expires: 1990-08-06
Abstract
Abstract Apparatus for use with a multichannel, time division multiplex, multidata rate closed data loop to variably compensate for delays incurred during circulation of the data bits around the loop. Incoming data is stored and retransmitted to the loop whereby the retransmission of data bits in a given data rate channel time slot occurs an integral number of time slot repetition periods after original transmission of data in that channel time slot.
Inventors
- 👤 John Dan Hill
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 06:34
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/02; H04L27/06; H04L12/00; H04L12/28; H04L12/42; H04L12/422; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4904
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
71 words
The method of synchronizing data bits in a time multiplex closed data bit loop having a plurality of data channels operating at at least two different rates comprising the steps of: storing received data bits from the loop in accordance with data bit rates; and retransmitting said data bits back onto the loop at times which coincide with an integral number of data bit repetition periods for each data bit channel.
Claim 2
Independent Claim
71 words
The method of synchronizing data bits in a time multiplex closed data bit loop having a plurality of data channels operating at at least two different rates comprising the steps of: storing received data bits from the loop in accordance with data bit rates; and retransmitting said data bits back onto the loop at times which coincide with an integral number of data bit repetition periods for each data bit channel.
Claim 3
Independent Claim
87 words
The method of synchronizing data bits in a data bit loop wherein data bits are circulated in a time division multiplex mode, and wherein some adjacent time slots comprise data channels supplying data at different repetition rates comprising the steps of: storing received data in different storage means corresponding with their data circulation rates; and retransmitting the stored data back onto the loop in a new arrangement such that the time repetition period of data transmitted for a given data channel is maintained at an integral number.
Claim 4
Independent Claim
87 words
The method of synchronizing data bits in a data bit loop wherein data bits are circulated in a time division multiplex mode, and wherein some adjacent time slots comprise data channels supplying data at different repetition rates comprising the steps of: storing received data in different storage means corresponding with their data circulation rates; and retransmitting the stored data back onto the loop in a new arrangement such that the time repetition period of data transmitted for a given data channel is maintained at an integral number.
Claim 5
Dependent Claim
40 words
The method of claim 2 comprising the additional steps of: demultiplexing the received data into groups corresponding with their data circulation rates; and recombining the stored data in a new multiplex arrangement as part of the final step of retransmitting.
Claim 6
Independent Claim
113 words
The method of delaying data bits in a received signal from a data bit loop before retransmitting so that the data bits are retransmitted to the loop in a time slot which is an integral number of time slot repetition periods after the original transmission thereof comprising the steps of: generating data bit synchronizing signals responsive to the received signal; storing received data bits in a register in accordance with said data bit synchronizing signals; generating transmission data bit synchronizing signals; and transmitting data bits from said register in accordance with the transmission of data bit synchronizing signals such that the arrangement of data bits in the transmitted signal differs from that received.
Claim 7
Independent Claim
113 words
The method of delaying data bits in a received signal from a data bit loop before retransmitting so that the data bits are retransmitted to the loop in a time slot which is an integral number of time slot repetition periods after the original transmission thereof comprising the steps of: generating data bit synchronizing signals responsive to the received signal; storing received data bits in a register in accordance with said data bit synchronizing signals; generating transmission data bit synchronizing signals; and transmitting data bits from said register in accordance with the transmission of data bit synchronizing signals such that the arrangement of data bits in the transmitted signal differs from that received.
Claim 8
Independent Claim
179 words
The method of delaying data bits from a data bit loop before retransmitting so that the data bits are retransmitted to the loop in the proper time slot wherein the time slot in retransmission is an integral number of time slot repetition periods after the original transmission thereof and further wherein different time slots have different data bit repetition periods comprising the steps of: receiving a data bit stream from a data bit loop; detecting said data bit stream to produce data bit and data frame synchronizing signals; storing said received data bits in a first storage register means in accordance with said data bit synchronizing signals; storing data bits occurring at different repetition periods in a second storage register means in accordance with said data frame synchronizing signals; generating transmission data bit synchronizing signals and transmission frame bit synchronizing signals; combining channel data and frame data bits from said first and second storage register means in a predetermined sequence and in accordance with said transmission data bit and frame bit synchronizing signals; and transmitting said combined data bits.
Claim 9
Independent Claim
179 words
The method of delaying data bits from a data bit loop before retransmitting so that the data bits are retransmitted to the loop in the proper time slot wherein the time slot in retransmission is an integral number of time slot repetition periods after the original transmission thereof and further wherein different time slots have different data bit repetition periods comprising the steps of: receiving a data bit stream from a data bit loop; detecting said data bit stream to produce data bit and data frame synchronizing signals; storing said received data bits in a first storage register means in accordance with said data bit synchronizing signals; storing data bits occurring at different repetition periods in a second storage register means in accordance with said data frame synchronizing signals; generating transmission data bit synchronizing signals and transmission frame bit synchronizing signals; combining channel data and frame data bits from said first and second storage register means in a predetermined sequence and in accordance with said transmission data bit and frame bit synchronizing signals; and transmitting said combined data bits.
Claim 10
Dependent Claim
131 words
Delay apparatus comprising, in combination: first means for demodulating input received multiplex data signals to provide a plurality of channel data signals occurring at a plurality of different data rates at an output means thereof; storage means, including input and output means, for storing, in accordance with their different data rates, said plurality of channel data signals having said input means thereof connected to said output means of said first means; modulating means, including input means and apparatus output means, for supplying apparatus multiplexed and modulated data signals at the apparatus output means thereof; and second means connected to said storage means and said modulating means for supplying stored signals to said modulating means after a determinable delay time, the delay time being different for data signals of different data rates.
Claim 11
Dependent Claim
131 words
Delay apparatus comprising, in combination: first means for demodulating input received multiplex data signals to provide a plurality of channel data signals occurring at a plurality of different data rates at an output means thereof; storage means, including input and output means, for storing, in accordance with their different data rates, said plurality of channel data signals having said input means thereof connected to said output means of said first means; modulating means, including input means and apparatus output means, for supplying apparatus multiplexed and modulated data signals at the apparatus output means thereof; and second means connected to said storage means and said modulating means for supplying stored signals to said modulating means after a determinable delay time, the delay time being different for data signals of different data rates.
Claim 12
Dependent Claim
53 words
Apparatus as claimed in claim 6 wherein: said second means includes clock means for serially and sequentially connecting the data channels of said storage means to said modulating means; and the delay time for a given channel of received data before remodulation in accordance with the relative point in the sequence of connections.
Claim 13
Dependent Claim
39 words
Apparatus as claimed in claim 6 wherein: different data channels of said received multiplex data signals occur at different data repetition rates; and said storage means comprises a plurality of units each storing data at a distinct repetition rate.
Claim 14
Dependent Claim
39 words
Apparatus as claimed in claim 7 wherein: different data channels of said received multiplex data signals occur at different data repetition rates; and said storage means comprises a plurality of units each storing data at a distinct repetition rate.
Claim 15
Dependent Claim
101 words
Buffering apparatus for use with a time division multiplexed data closed loop comprising, in combination: receiving means for receiving data from said loop at a plurality of rates; transmission means for transmitting the data into said loop at a like plurality of rates; storage means connected between said receiving and transmission means for temporarily storing a plurality of channels of received data; and clock means for designating in logical and sequential order the channel of data to be transmitted from said storage means, the delay occurring in said storage means varying in accordance with the rate of occurrence for given data.
Claim 16
Dependent Claim
101 words
Buffering apparatus for use with a time division multiplexed data closed loop comprising, in combination: receiving means for receiving data from said loop at a plurality of rates; transmission means for transmitting the data into said loop at a like plurality of rates; storage means connected between said receiving and transmission means for temporarily storing a plurality of channels of received data; and clock means for designating in logical and sequential order the channel of data to be transmitted from said storage means, the delay occurring in said storage means varying in accordance with the rate of occurrence for given data.
Claim 17
Dependent Claim
51 words
Apparatus as claimed in claim 10 wherein: said received data occurs at different repetition rates for different channels; said storage means comprises a plurality of units each utilized for storing data of different repetition rates; and the transmitted serial data bit pattern is different from the received serial data bit pattern.
Claim 18
Dependent Claim
209 words
Apparatus for temporarily delaying data bits in a data bit loop before retransmission thereof so that the data bits are retransmitted to the loop in a time slot which is an integral number of time slot repetition periods after the original transmission of data therein and further wherein different time slots may have different data bit repetition periods comprising, in combination: means for receiving a data bit stream from said data bit loop; means for detecting data bits, data bit synchronizing signals, and data frame synchronizing signals from said data bit stream and for providing outputs thereof; first storage means for storing data bits from said data bit stream in accordance with said data bit synchronizing signals; second storage means for storing data bits occurring in time slots having a data bit repetition rate which is different from the repetition rate of other data bits in said data bit stream in accordance with said data frame synchronizing signals; means for generating transmission data bit synchronizing signals and transmission frame bit synchronizing signals; means for combining data bits from said first and second storage means in a predetermined sequence and in accordance with said transmission data bit and frame bit synchronizing signals; and means for transmitting said combined data bits.
Claim 19
Dependent Claim
209 words
Apparatus for temporarily delaying data bits in a data bit loop before retransmission thereof so that the data bits are retransmitted to the loop in a time slot which is an integral number of time slot repetition periods after the original transmission of data therein and further wherein different time slots may have different data bit repetition periods comprising, in combination: means for receiving a data bit stream from said data bit loop; means for detecting data bits, data bit synchronizing signals, and data frame synchronizing signals from said data bit stream and for providing outputs thereof; first storage means for storing data bits from said data bit stream in accordance with said data bit synchronizing signals; second storage means for storing data bits occurring in time slots having a data bit repetition rate which is different from the repetition rate of other data bits in said data bit stream in accordance with said data frame synchronizing signals; means for generating transmission data bit synchronizing signals and transmission frame bit synchronizing signals; means for combining data bits from said first and second storage means in a predetermined sequence and in accordance with said transmission data bit and frame bit synchronizing signals; and means for transmitting said combined data bits.
Claim 20
Dependent Claim
90 words
Apparatus for synchronizing a data bit loop wherein data bits are circulating in a time division multiplex mode and further wherein some adjacent time slots comprise data channels supplying data at different bit rates comprising in combination: means for temporarily storing received data in accordance with the data circulation rate; and means for retransmitting the stored data back onto the loop in a data bit arrangement differing from that received such that the time repetition period of data transmitted for a given data channel is maintained at an integral number.
Claim 21
Dependent Claim
90 words
Apparatus for synchronizing a data bit loop wherein data bits are circulating in a time division multiplex mode and further wherein some adjacent time slots comprise data channels supplying data at different bit rates comprising in combination: means for temporarily storing received data in accordance with the data circulation rate; and means for retransmitting the stored data back onto the loop in a data bit arrangement differing from that received such that the time repetition period of data transmitted for a given data channel is maintained at an integral number.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-08-01 | 1976-01-31 | 1976-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-08-01 | 1980-01-31 | 1980-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-08-01 | 1984-01-31 | 1984-08-01 | $7700.00 | Window Closed / Lapsed |