Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
570 words
A bus connection system (141,1421-1432,145,14001-14096) for connecting a plurality (M) of input busses (14101-14103) having a message format to a plurality (N) of output busses (93001-93768) having a data format, said system comprising a plurality (I) of first program control means (1421-1432), each identified by a logical identifier (L 2 =0, 1, . . . , I-10) and associated with an interface bus having a communication format (e.g., GPIB), a plurality (J) of second program control means (14001-14096) arranged into a preselected number (I) of sets, wherein in each of said sets each of said second control means is identified by a logical identifier (L 3 =0, 1, . . . , N/J-1) and is coupled to said interface bus of a corresponding first control means, said first control means and said second control means each having processor means (550,570) with accessible memory (520,530,540), interrupt circuitry (510) including an interrupt processing routine to signal the completion of events and a multitasking operating system (OS) including a task scheduler (SCHEDULER) for scheduling, according to a predetermined priority, corresponding task issuing as a result of said event completions, said first control means including first input bus control means (710,720), connected to one of said input busses and serviced by its associated identified task scheduler in response to its associated interrupt processing routine, for receiving and storing said messages (INFORMATION fields) in an area of its associated memory assigned to said one of said input busses whenever said messages (`down -- route`) contain said identifier assigned to said each of said first control means, for augmenting said stored messages with routing parameters (`up -- route`) identifying which of said input busses transmitted said received messages and for signaling message-complete events, said first control means including first interface bus control means (620'), connected to said interface bus and serviced by its associated task scheduler in response to its associated interrupt processing routine, for storing communications (INFORMATION fields) received over said interface bus in a memory location determined by parameters (`up -- route`) in said communications, for transmitting each of said augmented messages over said interface bus and for signaling message-complete events, said first input bus control means including means (710,720) for transmitting communications from each said memory location over the associated one of said input busses, said second control means including second input means (710',720'), serviced by its associated task scheduler in response to its associated interrupt processing routine for receiving and storing communications (INFORMATION fields) arriving over said interface bus in an area of its associated memory assigned to said interface bus whenever said communications (`down -- route`) contain said identifier assigned to said each of said second control means and for signaling message-complete events, said second control means including output bus control means (761-768,751-753), connected to a preselected numbeer (N/J) of said output busses and serviced by its associated task scheduler in response to its associated interrupt processing routine, for storing data (INFORMATION fields) received over each of said preselected output busses in a memory location determined by parameters (`up -- route`) in said data, for transmitting said communications from said assigned memory over the corresponding one of said preselected output busses identified by routing parameters (`down -- route`) in each of said communications and for signaling message-complete events, said second interface bus control means including means (710',720') for transmitting data from each said corresponding location in memory over said interface bus.
Claim 2
Dependent Claim
570 words
A bus connection system (141,1421-1432,145,14001-14096) for connecting a plurality (M) of input busses (14101-14103) having a message format to a plurality (N) of output busses (93001-93768) having a data format, said system comprising a plurality (I) of first program control means (1421-1432), each identified by a logical identifier (L 2 =0, 1, . . . , I-10) and associated with an interface bus having a communication format (e.g., GPIB), a plurality (J) of second program control means (14001-14096) arranged into a preselected number (I) of sets, wherein in each of said sets each of said second control means is identified by a logical identifier (L 3 =0, 1, . . . , N/J-1) and is coupled to said interface bus of a corresponding first control means, said first control means and said second control means each having processor means (550,570) with accessible memory (520,530,540), interrupt circuitry (510) including an interrupt processing routine to signal the completion of events and a multitasking operating system (OS) including a task scheduler (SCHEDULER) for scheduling, according to a predetermined priority, corresponding task issuing as a result of said event completions, said first control means including first input bus control means (710,720), connected to one of said input busses and serviced by its associated identified task scheduler in response to its associated interrupt processing routine, for receiving and storing said messages (INFORMATION fields) in an area of its associated memory assigned to said one of said input busses whenever said messages (`down -- route`) contain said identifier assigned to said each of said first control means, for augmenting said stored messages with routing parameters (`up -- route`) identifying which of said input busses transmitted said received messages and for signaling message-complete events, said first control means including first interface bus control means (620'), connected to said interface bus and serviced by its associated task scheduler in response to its associated interrupt processing routine, for storing communications (INFORMATION fields) received over said interface bus in a memory location determined by parameters (`up -- route`) in said communications, for transmitting each of said augmented messages over said interface bus and for signaling message-complete events, said first input bus control means including means (710,720) for transmitting communications from each said memory location over the associated one of said input busses, said second control means including second input means (710',720'), serviced by its associated task scheduler in response to its associated interrupt processing routine for receiving and storing communications (INFORMATION fields) arriving over said interface bus in an area of its associated memory assigned to said interface bus whenever said communications (`down -- route`) contain said identifier assigned to said each of said second control means and for signaling message-complete events, said second control means including output bus control means (761-768,751-753), connected to a preselected numbeer (N/J) of said output busses and serviced by its associated task scheduler in response to its associated interrupt processing routine, for storing data (INFORMATION fields) received over each of said preselected output busses in a memory location determined by parameters (`up -- route`) in said data, for transmitting said communications from said assigned memory over the corresponding one of said preselected output busses identified by routing parameters (`down -- route`) in each of said communications and for signaling message-complete events, said second interface bus control means including means (710',720') for transmitting data from each said corresponding location in memory over said interface bus.