Patent US4538110A successfully refreshed from Google Patents.
US4538110A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High-stability clock signal regenerator with a stable fixed frequency backup clock generator
Assignee: US Philips Corp
•
Filing: 1983-06-29
•
Granted: 1985-08-27
•
Expires: 2003-06-29
Abstract
Abstract A clock signal regenerator comprising a frequency control loop (1, 2, 3, 4) which comprises a variable-frequency clock signal generator (2) used in digital telephone exchanges, when a local clock signal must be generated from incoming clock signals (1-1, 1-N). The clock signal regenerator comprises a very stable auxiliary signal generator (9) and a first difference signal producer (11) for determining the frequency difference between the generated clock signal and the auxiliary signal. This frequency difference is determined periodically and written into a storage device (13). In addition, the regenerator comprises a second difference signal producer (14) in which the difference is determined between a new frequency difference determined in the first difference signal producer (11) and the preceding frequency difference stored in the storage arrangement (13). After the incoming clock signals (1-1, . . . 1-N) have dropped out the difference signal produced in the second difference signal producer (14) is applied as a control signal to the clock signal generator (2), and the content of the storage device ( 13) is not changed. This has the advantage that the stability of the clock signal regenerator is then the same as the stability of the auxiliary signal generator.
Inventors
- 👤 Leendert J. Hollaar
- 👤 Herman Zoetman
- 👤 Robert J. M. Verbeek
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:13
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/04; G06F1/12; H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/14; H03L7/143; H04; H04L; H04L7/00; H04L7/0079; H04L7/0083
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
222 words
A clock signal regenerator comprising a clock signal generator whose frequency is controlled by a control signal, said clock signal generator included in a control loop for synchronizing the frequency of the clock signal generated by the clock signal generator with an input signal applied to the control loop by means of a control signal derived from the frequency difference between the clock signal and the input signal, said regenerator comprising: an auxiliary signal generator for producing a fixed-frequency auxiliary signal, a first difference-signal producer connected to the auxiliary signal generator and connected to receive the generated clock signal to determine the frequency difference between the auxiliary signal and a signal which is proportional to the clock signal, a storage device connected to the first difference signal producer for storing the determined frequency difference, a second difference signal producer connected to the first difference signal producer and to the storage device to determine the difference between the frequency difference stored in the storage device and a signal produced by the first difference signal producer, which signal is proportional to the frequency difference between the auxiliary signal and the clock signal, and switching means for applying in the absence of a reliable input signal the signal produced by the second difference signal producer as a control signal to the controllable clock signal generator.
Claim 2
Dependent Claim
222 words
A clock signal regenerator comprising a clock signal generator whose frequency is controlled by a control signal, said clock signal generator included in a control loop for synchronizing the frequency of the clock signal generated by the clock signal generator with an input signal applied to the control loop by means of a control signal derived from the frequency difference between the clock signal and the input signal, said regenerator comprising: an auxiliary signal generator for producing a fixed-frequency auxiliary signal, a first difference-signal producer connected to the auxiliary signal generator and connected to receive the generated clock signal to determine the frequency difference between the auxiliary signal and a signal which is proportional to the clock signal, a storage device connected to the first difference signal producer for storing the determined frequency difference, a second difference signal producer connected to the first difference signal producer and to the storage device to determine the difference between the frequency difference stored in the storage device and a signal produced by the first difference signal producer, which signal is proportional to the frequency difference between the auxiliary signal and the clock signal, and switching means for applying in the absence of a reliable input signal the signal produced by the second difference signal producer as a control signal to the controllable clock signal generator.
Claim 3
Dependent Claim
67 words
A clock signal regenerator as claimed in claim 1, wherein the first difference signal producer comprises a first adding and subtracting circuit to which the auxiliary signal and the generated clock signal are applied for increasing the counting position of the first adding and subtracting circuit by means of one of the signals applied thereto and for decreasing the counting position by means of the adder signal.
Claim 4
Dependent Claim
35 words
A clock signal regenerator as claimed in claim 2, wherein the switching means applies to the storage circuit the counting position of the first adding and subtracting circuit when a reliable input signal is present.
Claim 5
Dependent Claim
69 words
A clock signal regenerator as claimed in claim 3, wherein the input signal is also applied to the first difference signal producer and the switching means are connected to apply the input signal to the first adding and subtracting circuit when a reliable input signal is present and for applying the generated clock signal to the first adding and subtracting circuit in the absence of a reliable input signal.
Claim 6
Dependent Claim
110 words
A clock signal regenerator as claimed in claim 2, wherein the input signal is also applied to the first difference signal producer, and the first difference signal producer comprises a second adding and subtracting circuit to which the auxiliary signal and the input signal are applied for increasing the counting position of the second adding and subtracting circuit by means of one of the signals applied thereto and for decreasing the counting position by means of the other signal and that the first switching means is connected for applying the counting position of the second adding and subtracting circuit to the storage circuit when a reliable input signal is present.
Claim 7
Dependent Claim
47 words
A clock signal regenerator as claimed in claim 1, wherein the regenerator comprises a logic circuit to which several incoming clock pulse signals are applied and which includes means for determining the control signal, the input signal being a weighted sum of the incoming clock pulse signals.
References Cited (Backward Citations)
US3865981A
Cited
US3952254A
Cited
US4027261A
Cited
US4019143A
Cited
US4105979A
Cited
US4239982A
Cited
US4471299A
Cited
US4480198A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-08-26 | 1989-02-25 | 1989-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-08-26 | 1993-02-25 | 1993-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-08-26 | 1997-02-25 | 1997-08-27 | $7700.00 | Window Closed / Lapsed |