US4535258A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor-transistor logic circuit with improved switching times
Assignee: Fujitsu Ltd
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Filing: 1982-08-17
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Granted: 1985-08-13
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Expires: 2002-08-17
Abstract
Abstract A transistor circuit including a pull-down circuit. The pull-down circuit functions to discharge electric charges stored in a base of an output transistor of the transistor circuit and comprises a control transistor, a two-terminal unit (impedance means), and a resistor. The stored electric charges are discharged to ground by way of the two-terminal unit and the resistor. The stored electric charges can be discharged selectively when the output transistor is turned off, with the aid of the control transistor.
Inventors
- 👤 Tetsu Tanizawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 15:13
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/088; H03K19/01; H03K19/013; H03K19/0136
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
304 words
A transistor circuit operatively connectable to a power supply line and a ground line, comprising: an input terminal operatively connected to reveive an input signal; an output terminal; a phase-inverting transistor of a first conductivity type, operatively connected to said input terminal, having a base for receiving the input signal, having a collector operatively connected to the power supply line and having an emitter, and generating an output signal; first and second output transistors, each having a base operatively connected to the emitter and collector, respectively, of said phase inverting transistor and said first transistor having a collector operatively connected to the output terminal, and said second transistor having a collector operatively connected to the power supply line, and said first and second output transistors being alternately turned on and off in response to the output signal of said phase-inverting transistor; and a pull-down circuit, operatively connected to said input terminal and said first output transistor, for discharging electric charges stored in the base of said first output transistor, said pull-down circuit comprising: a control circuit, operatively connected to said input terminal and operatively connected to the power supply line, having an output node for generating a signal having the same phase as the input signal at the output node, said control circuit includes: a control transistor, having a base operatively connected to said input terminal, having a collector operatively connected to the power supply line, and having an emitter connected to said output node for receiving the input signal and generating the signal having the same phase as the input signal; and a resistor operatively connected between the emitter of said control transistor and the ground line; and two-terminal impedance means, operatively connected between the base of said first output transistor and the output node of said control circuit, for providing an impedance.
Claim 2
Dependent Claim
304 words
A transistor circuit operatively connectable to a power supply line and a ground line, comprising: an input terminal operatively connected to reveive an input signal; an output terminal; a phase-inverting transistor of a first conductivity type, operatively connected to said input terminal, having a base for receiving the input signal, having a collector operatively connected to the power supply line and having an emitter, and generating an output signal; first and second output transistors, each having a base operatively connected to the emitter and collector, respectively, of said phase inverting transistor and said first transistor having a collector operatively connected to the output terminal, and said second transistor having a collector operatively connected to the power supply line, and said first and second output transistors being alternately turned on and off in response to the output signal of said phase-inverting transistor; and a pull-down circuit, operatively connected to said input terminal and said first output transistor, for discharging electric charges stored in the base of said first output transistor, said pull-down circuit comprising: a control circuit, operatively connected to said input terminal and operatively connected to the power supply line, having an output node for generating a signal having the same phase as the input signal at the output node, said control circuit includes: a control transistor, having a base operatively connected to said input terminal, having a collector operatively connected to the power supply line, and having an emitter connected to said output node for receiving the input signal and generating the signal having the same phase as the input signal; and a resistor operatively connected between the emitter of said control transistor and the ground line; and two-terminal impedance means, operatively connected between the base of said first output transistor and the output node of said control circuit, for providing an impedance.
Claim 3
Dependent Claim
19 words
A transistor circuit as set forth in claim 1, wherein said control transistor is of the first conductivity type.
Claim 4
Dependent Claim
39 words
A transistor circuit as set forth in claim 1, wherein the base of said control transistor is operatively connected to reveive an inverted input signal and has a second conductivity type opposite to that of the first conductivity type.
Claim 5
Dependent Claim
21 words
A transistor circuit as set forth in claim 2 or 3, wherein said two-terminal impedance means comprises a Schottky barrier diode.
Claim 6
Dependent Claim
19 words
A transistor circuit as set forth in claim 2 or 3, wherein said two-terminal impedance means comprises a diode.
Claim 7
Dependent Claim
19 words
A transistor circuit as set forth in claim 2 or 3, wherein said two-terminal impedance means comprises a capacitor.
Claim 8
Dependent Claim
19 words
A transistor circuit as set forth in claim 2 or 3, wherein said two-terminal impedance means comprises a resistor.
Claim 9
Dependent Claim
26 words
A transistor circuit as set forth in claim 2 or 3, wherein said two-terminal impedance means comprises a parallel circuit including a capacitor and a resistor.
Claim 10
Dependent Claim
26 words
A transistor circuit as set forth in claim 2 or 3, wherein said two-terminal impedance means comprises a parallel circuit including a diode and a resistor.
Claim 11
Dependent Claim
216 words
A transistor circuit, operatively connected to a source potential, having an input terminal operatively connected to reveive an input signal and having an output terminal, comprising: a phase-inverting transistor, having a base operatively connected to the input terminal for receiving the input signal, having a collector operatively connected to the source potential and having an emitter; first and second output transistors, operatively connected to the output terminal, said first and second output transistors each having a base operatively connected to said phase-inverting transistor and said first and second transistors each having a collector operatively connected to the output terminal and the source potential, respectively. pull-down means, operatively connected between the input terminal and the base of said first output transistor, for discharging electric charges stored in the base of said first output transistor, comprising: two-terminal impedance means for providing an impedance, having a first terminal operatively connected to the base of said first output transistor and having a second terminal operatively connected to the input terminal; a control transistor, having a base operatively connected to the input terminal, having an emitter operatively connected to the second terminal of said two-terminal impedance means and having a collector operatively connected to the source potential; and a resistor operatively connected between the emitter of said control transistor and ground.
Claim 12
Dependent Claim
216 words
A transistor circuit, operatively connected to a source potential, having an input terminal operatively connected to reveive an input signal and having an output terminal, comprising: a phase-inverting transistor, having a base operatively connected to the input terminal for receiving the input signal, having a collector operatively connected to the source potential and having an emitter; first and second output transistors, operatively connected to the output terminal, said first and second output transistors each having a base operatively connected to said phase-inverting transistor and said first and second transistors each having a collector operatively connected to the output terminal and the source potential, respectively. pull-down means, operatively connected between the input terminal and the base of said first output transistor, for discharging electric charges stored in the base of said first output transistor, comprising: two-terminal impedance means for providing an impedance, having a first terminal operatively connected to the base of said first output transistor and having a second terminal operatively connected to the input terminal; a control transistor, having a base operatively connected to the input terminal, having an emitter operatively connected to the second terminal of said two-terminal impedance means and having a collector operatively connected to the source potential; and a resistor operatively connected between the emitter of said control transistor and ground.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-08-12 | 1989-02-11 | 1989-08-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-08-12 | 1993-02-11 | 1993-08-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-08-12 | 1997-02-11 | 1997-08-13 | $7700.00 | Window Closed / Lapsed |