US4413194A
Expired / Lapsed
US
⏱️ 0.0 years remaining
TTL Output circuit having means for preventing output voltage excursions induced by negative current reflections
Assignee: Motorola Solutions Inc
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Filing: 1981-07-10
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Granted: 1983-11-01
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Expires: 2001-07-10
Abstract
Abstract A transistor-transistor logic circuit includes an output stage comprising a pull-up and pull-down transistor and an input stage for receiving one or more binary logic signals. First and second current drive transistors regulate base drive to the pull-up and pull-down transistors respectively. A first switching transistor turns said first current drive transistor off when the binary signals reach a first logic level. A second switching transistor turns the second current drive transistor on when the binary logic signals reach the first logic level. In this manner, negative reflections at the output of the circuit will not result in the pull-up transistor and its associated current drive transistor being turned off.
Inventors
- 👤 William A. Birch
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:35
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00307; H03K19/02; H03K19/08; H03K19/082; H03K19/088
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
209 words
In a logic circuit having input means for receiving one or more binary logic signals, a pull-up output transistor, a pull-down output transistor having at least a base terminal, a first switching transistor having at least a base terminal, coupled to said input means, a first current drive transistor having at least a collector terminal, for supplying drive to said pull-up transistor when said binary logic signals reach said first logic level, the improvement comprising: second current drive transistor means having base, emitter and collector terminals, said base coupled to the collector of said first switching transistor, said collector being connectible to a first source of supply voltage and said emitter coupled to the base of said pull-down transistor for supplying drive to said pull-down transistor when said binary logic signals reach said second logic level; and second switching transistor means having base, emitter and collector terminals, said base coupled to the collector of said first switching transistor, said collector coupled to the base of said first current drive transistor, and said emitter being connectible to a second source of supply voltage, said second switching transistor means for diverting drive from the base of said first current drive transistor when said binary logic signals reach said second logic level.
Claim 2
Dependent Claim
209 words
In a logic circuit having input means for receiving one or more binary logic signals, a pull-up output transistor, a pull-down output transistor having at least a base terminal, a first switching transistor having at least a base terminal, coupled to said input means, a first current drive transistor having at least a collector terminal, for supplying drive to said pull-up transistor when said binary logic signals reach said first logic level, the improvement comprising: second current drive transistor means having base, emitter and collector terminals, said base coupled to the collector of said first switching transistor, said collector being connectible to a first source of supply voltage and said emitter coupled to the base of said pull-down transistor for supplying drive to said pull-down transistor when said binary logic signals reach said second logic level; and second switching transistor means having base, emitter and collector terminals, said base coupled to the collector of said first switching transistor, said collector coupled to the base of said first current drive transistor, and said emitter being connectible to a second source of supply voltage, said second switching transistor means for diverting drive from the base of said first current drive transistor when said binary logic signals reach said second logic level.
Claim 3
Dependent Claim
30 words
A circuit according to claim 1 wherein said second current drive transistor is a dual emitter transistor both of which are coupled to the base terminal of said pull-down transistor.
Claim 4
Dependent Claim
27 words
A circuit according to claim 2 wherein each of said pull-up, pull-down, first current drive, second current drive, first switching and second switching transistors are Schottky transistors.
Claim 5
Dependent Claim
316 words
A logic circuit, comprising: input means for receiving one or more binary logic signals; a pull-up output transistor having base, emitter and collector terminals, said collector terminal being connectible to a first source of supply voltage; a pull-down output transistor having base, emitter and collector terminals, said emitter being connectible to a second source of supply voltage and said collector coupled to the emitter of said pull-up output transistor; first current drive transistor means having base, emitter and collector terminals, said emitter being coupled to the base of said pull-up output transistor for supplying base drive to said pull-up output transistor when said binary logic signals reach a first logic level, said collector coupled to the collector of said pull-up output transistor and said base being connectible to a first source of supply voltage; second current drive transistor means having base, emitter and collector terminals, said emitter being coupled to the base of said pull-down output transistor for supplying base drive to said pull-down output transistor when said binary logic signals reach said second logic level, and said collector being connectible to said first source of supply voltage; first switching transistor means having base, emitter and collector terminals, said base being coupled to said input means, said collector being coupled to the base of said second current drive transistor means, and said emitter being connectible to a second source of supply voltage, for turning on said second current drive transistor means when said binary logic signals reach said second logic level; and second switching transistor means having base, emitter and collector terminals, said base coupled to the collector of said first switching transistor means, said emitter being connectible to said second source of supply voltage, and said collector being coupled to said first current drive transistor means for turning said first current drive transistor means on when said binary logic signals reach said first logic level.
Claim 6
Dependent Claim
316 words
A logic circuit, comprising: input means for receiving one or more binary logic signals; a pull-up output transistor having base, emitter and collector terminals, said collector terminal being connectible to a first source of supply voltage; a pull-down output transistor having base, emitter and collector terminals, said emitter being connectible to a second source of supply voltage and said collector coupled to the emitter of said pull-up output transistor; first current drive transistor means having base, emitter and collector terminals, said emitter being coupled to the base of said pull-up output transistor for supplying base drive to said pull-up output transistor when said binary logic signals reach a first logic level, said collector coupled to the collector of said pull-up output transistor and said base being connectible to a first source of supply voltage; second current drive transistor means having base, emitter and collector terminals, said emitter being coupled to the base of said pull-down output transistor for supplying base drive to said pull-down output transistor when said binary logic signals reach said second logic level, and said collector being connectible to said first source of supply voltage; first switching transistor means having base, emitter and collector terminals, said base being coupled to said input means, said collector being coupled to the base of said second current drive transistor means, and said emitter being connectible to a second source of supply voltage, for turning on said second current drive transistor means when said binary logic signals reach said second logic level; and second switching transistor means having base, emitter and collector terminals, said base coupled to the collector of said first switching transistor means, said emitter being connectible to said second source of supply voltage, and said collector being coupled to said first current drive transistor means for turning said first current drive transistor means on when said binary logic signals reach said first logic level.
Claim 7
Dependent Claim
31 words
A logic circuit according to claim 4 wherein each of said first and second switching transistors, first and second current drive transistors and said pull-up and pull-down transistors are Schottky transistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-10-31 | 1987-05-02 | 1987-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-10-31 | 1991-05-02 | 1991-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-10-31 | 1995-05-02 | 1995-11-01 | $7700.00 | Window Closed / Lapsed |