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US4535231A Expired / Lapsed US ⏱️ 0.0 years remaining

Photodetector output circuit

Assignee: Kokusai Denki Electric Inc
•
Filing: 1982-07-21
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Granted: 1985-08-13
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Expires: 2002-07-21
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Abstract

Abstract A photodetector output circuit comprises a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light falling thereon, a first shift register for receiving the signals from the first photodetectors in the pairs, a second shift register for receiving the signals from the second photodetectors in the pairs, and a pair of first and second sample and hold circuits for successively sampling and holding outputs from final stages of the first and second shift registers, respectively. A comparator receives as inputs outputs from the first and second sample and hold circuits for delivering out signals when the received inputs have a level difference of a predetermined value or higher. With this arrangement, the photodetector output circuit can produce digital signals indicative only of abrupt changes in the level of incident light and excludes any influence due to gradual light level variations which would result from shading.

Inventors

  • 👤 Shuhei Tanaka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 08:51
CPC Classifications
G; G02; G02B; G02B7/00; G02B7/28; G03; G03B; G03B7/00; G03B7/08; G03B7/099; G03B7/0993; G03B7/0997; G03B7/09979

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 165 words
A photodetector output circuit for an auto focussing camera comprising: a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light from an object to be photographed falling thereon; a first analog shift register for receiving the signals from said first photodetectors in said pairs; a second analog shift register for receiving the signals from said second photodetectors in said pairs; a pair of first and second sample and hold circuits for successively sampling and holding said analog outputs from final states of said first and second shift registers, respectively, and for successively resetting held samples after they have overlapped in time; and a comparator receptive as inputs of outputs from said first and second sample and hold circuits having gated output for delivering out digital logic signals representing when the received overlapped inputs have a level difference of a predetermined value or higher thereby providing comparator output which rejects gradual changes in incident light.
Claim 2
Dependent Claim 165 words
A photodetector output circuit for an auto focussing camera comprising: a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light from an object to be photographed falling thereon; a first analog shift register for receiving the signals from said first photodetectors in said pairs; a second analog shift register for receiving the signals from said second photodetectors in said pairs; a pair of first and second sample and hold circuits for successively sampling and holding said analog outputs from final states of said first and second shift registers, respectively, and for successively resetting held samples after they have overlapped in time; and a comparator receptive as inputs of outputs from said first and second sample and hold circuits having gated output for delivering out digital logic signals representing when the received overlapped inputs have a level difference of a predetermined value or higher thereby providing comparator output which rejects gradual changes in incident light.
Claim 3
Dependent Claim 48 words
A photodetector output circuit according to claim 1, wherein each of said pairs of the photodetectors is composed of an odd-numbered photodetector and an adjacent even-numbered photodetector, and said first and second shift registors being receptive of outputs from said odd-numbered and even-numbered photodetectors, respectively, in said pairs.
Claim 4
Dependent Claim 59 words
A photodetector output circuit according to claim 1, wherein each of said first and second sample and hold circuits comprises a first switch for sampling the output from one of said first and second shift registers, a capacitor for holding the sampled output, and a second switch for resetting said capacitor to deliver the held sample to said comparator.
Claim 5
Dependent Claim 26 words
A photodetector output circuit according to claim 1, further including a buffer amplifier connected between said first and second sample and hold circuits and said comparator.
Claim 6
Dependent Claim 30 words
A photodetector output circuit according to claim 1, further including a switch connected to the output of said comparator for delivering out the signals from the output of the comparator.

References Cited (Backward Citations)

US4329577A Cited
US4255028A Cited
US4252425A Cited
US4298259A Cited
US4377342A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-08-12 1989-02-11 1989-08-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-08-12 1993-02-11 1993-08-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-08-12 1997-02-11 1997-08-13 $7700.00 Window Closed / Lapsed

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