Abstract A method is provided by the present invention for manufacturing a semiconductor device which includes supplying an impurity for forming an impurity area in a semiconductor substrate wherein the amount of the impurity defining the corners of said area is adjusted so that the shape of said corners is controlled. In this method, adjustment of the amount of the impurity may be accomplished by supplying the impurity to said substrate by using a mask whose corners are enlarged or reduced for increasing or reducing the opening area of the mask. The adjustment of the amount of the impurity may alternatively be accomplished by supplying an impurity of conductivity type opposite to that of said impurity to the places where the corners are to be formed.
A semiconductor device comprising: a substrate of a first conductivity type; a first semiconductor area formed in said semiconductor substrate and having a second conductivity type opposite to said first conductivity type, said first area including a first corner; and a second semiconductor area of said first conductivity type formed in said first area, said second area having a second corner aligned with said first corner and formed such that the distance between said substrate and said second area, measured laterally with respect to the surface of said substrate, is at a maximum at said first and second corners in order to prevent a punch-through at said first and second corners.
Claim 2
Dependent Claim
111 words
A semiconductor device comprising: a substrate of a first conductivity type; a first semiconductor area formed in said semiconductor substrate and having a second conductivity type opposite to said first conductivity type, said first area including a first corner; and a second semiconductor area of said first conductivity type formed in said first area, said second area having a second corner aligned with said first corner and formed such that the distance between said substrate and said second area, measured laterally with respect to the surface of said substrate, is at a maximum at said first and second corners in order to prevent a punch-through at said first and second corners.
Claim 3
Dependent Claim
31 words
A device as claimed in claim 1 wherein said first area comprises a p-well complementary MOS and said second area comprises a source or a drain of an n-channel MOS transistor.
Claim 4
Dependent Claim
33 words
A device as claimed in claim 1 wherein said first area comprises an n-well of a complementary MOS and said second area comprises a source or a drain of a p-channel MOS transistor.