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US4531099A Expired / Lapsed US ⏱️ 0.0 years remaining

Amplifier

Assignee: Toshiba Corp
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Filing: 1983-04-19
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Granted: 1985-07-23
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Expires: 2003-04-19
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Abstract

Abstract An amplifier includes a differential amplifier which is supplied with a small amplitude signal in a normal condition and a large amplitude signal in an abnormal condition. Resistors and diodes jointly act to judge whether the differential amplifier issues a small or large amplitude signal. A small amplitude signal is amplified by a small amplitude signal-amplifying section and a large amplitude signal is amplified by a large amplitude signal-amplifying section. The large amplitude signal-amplifying section is supplied with a first source voltage B 2 . The small amplitude signal-amplifying section is impressed with a second source voltage B 1 . An output signal of the amplifier is supplied to a load A through an output terminal common to the small amplitude signal-amplifying section and large amplitude signal-amplifying section. The first and second source voltages B 2 , B 1 are chosen to have the following relationship: B.sub.2 >B.sub.1.

Inventors

  • 👤 Hiroshi Nakane

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:42
CPC Classifications
A; A23; A23L; A23L17/00; A23L17/60; H; H03; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0244; G; G05; G05D; G05D3/00; G05D3/12; G05D3/14

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 255 words
An amplifier comprising: input and output terminals; drive circuit means for receiving a signal from said input terminal and providing a drive signal at an output thereof; judging means, having first and second resistors coupled in series between said drive circuit means output and said amplifier output terminal and first and second diodes, each having a first end commonly connected to said drive circuit means output, for judging an amplitude of said drive signal; first power amplifying circuit means, including a first pair of complementary transistors having their bases commonly connected to the junction of said first and second resistors and their emitters commonly connected to said amplifier output terminal, for amplifying said drive signal; second power amplifying circuit means, including a second pair of complementary transistors having their bases respectively connected to respective second ends of said first and second diodes and their emitters commonly connected to said amplifier output terminal, for amplifying said drive signal; first power supply means for supplying positive and negative first source voltages (+B 1 , -B 1 ) to the respective collectors of said first pair of complementary transistors; and second power supply means for supplying positive and negative second source voltages (+B 2 , -B 2 ) to the respective collectors of said second pair of complementary transistors, said first and second source voltages satisfying: +B 2 >+B 1 and -B 2 <-B 1 , whereby said second power amplifying circuit means amplifies said drive signal only when said drive signal is greater than a predetermined level.
Claim 2
Dependent Claim 255 words
An amplifier comprising: input and output terminals; drive circuit means for receiving a signal from said input terminal and providing a drive signal at an output thereof; judging means, having first and second resistors coupled in series between said drive circuit means output and said amplifier output terminal and first and second diodes, each having a first end commonly connected to said drive circuit means output, for judging an amplitude of said drive signal; first power amplifying circuit means, including a first pair of complementary transistors having their bases commonly connected to the junction of said first and second resistors and their emitters commonly connected to said amplifier output terminal, for amplifying said drive signal; second power amplifying circuit means, including a second pair of complementary transistors having their bases respectively connected to respective second ends of said first and second diodes and their emitters commonly connected to said amplifier output terminal, for amplifying said drive signal; first power supply means for supplying positive and negative first source voltages (+B 1 , -B 1 ) to the respective collectors of said first pair of complementary transistors; and second power supply means for supplying positive and negative second source voltages (+B 2 , -B 2 ) to the respective collectors of said second pair of complementary transistors, said first and second source voltages satisfying: +B 2 >+B 1 and -B 2 <-B 1 , whereby said second power amplifying circuit means amplifies said drive signal only when said drive signal is greater than a predetermined level.
Claim 3
Dependent Claim 44 words
The amplifier according to claim 1, wherein the second power amplifying circuit means comprises a capacitor means for compensating dynamic range for a momentarily large amplitude signal and resistor means for narrowing the amplitude of the large amplitude signal supplied for a long time.
Claim 4
Dependent Claim 36 words
The amplifier according to claim 1, wherein said first power amplifying circuit means comprises a diode for suppressing a back flow of current to the first power supply means when the large amplitude signal is received.

References Cited (Backward Citations)

US3577092A Cited
JPS50103209A Cited
US4158179A Cited
US4117418A Cited
US4236120A Cited
GB2066013A Cited
US4401954A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-07-22 1989-01-21 1989-07-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-07-22 1993-01-21 1993-07-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-07-22 1997-01-21 1997-07-23 $7700.00 Window Closed / Lapsed

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