Patent US4530001A successfully refreshed from Google Patents.
US4530001A
Expired / Lapsed
US
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High voltage integrated semiconductor devices using a thermoplastic resin layer
Assignee: Oki Electric Industry Co Ltd
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Filing: 1981-09-15
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Granted: 1985-07-16
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Expires: 2001-09-15
Abstract
Abstract The semiconductor device comprises a semiconductor substrate, a plurality of spaced active elements, for example, of a planer type formed on one surface of the substrate, and a supporting plate bonded to the opposite surface of the substrate. A groove is cut through the substrate to reach the supporting plate for isolating the active elements.
Inventors
- 👤 Haruo Mori
- 👤 Yasuo Ohno
- 👤 Yutaka Ohta
- 👤 Hiroshi Tanabe
- 👤 Kotaro Kato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 22:09
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/68; H10P14/683; H10D; H10D86/00; H10D86/201; H10P14/65; H10P14/6502; H10P14/6506; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10W; H10W10/00; H10W10/01; H10W10/021; H10W10/20; H10W70/00; H10W70/60; H10W70/67; H10W70/69; H10W70/695; H10W72/00; H10W72/071; H10W72/073; H10W72/07331; H10W72/07337; H10W72/30; H10W72/351; H10W72/353; H10W72/354
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
80 words
A high voltage integrated semiconductor device comprising: a monocrystalline semiconductor substrate having on one surface thereof a plurality of high voltage active elements which are isolated from each other by physically-cut grooves; a bismaleimide-triazine (BT) resin supporting plate for preventing mechanical deformation of said substrate and having a heat resistant property; and an adhesive layer for attaching said supporting plate to an opposite surface of said substrate and having an electrically insulating property; wherein said grooves reach said supporting plate.
Claim 2
Dependent Claim
80 words
A high voltage integrated semiconductor device comprising: a monocrystalline semiconductor substrate having on one surface thereof a plurality of high voltage active elements which are isolated from each other by physically-cut grooves; a bismaleimide-triazine (BT) resin supporting plate for preventing mechanical deformation of said substrate and having a heat resistant property; and an adhesive layer for attaching said supporting plate to an opposite surface of said substrate and having an electrically insulating property; wherein said grooves reach said supporting plate.
Claim 3
Dependent Claim
16 words
A semiconductor device according to claim 1, wherein said monocrystalline semiconductor substrate is a silicon substrate.
Claim 4
Dependent Claim
43 words
A semiconductor device according to claim 2, wherein said adhesive layer is of an electrically insulating material selected from the group consisting of a silicone resin, an epoxy resin and glass and wherein said supporting plate is heat resistant to about 400° C.
Claim 5
Dependent Claim
18 words
A semiconductor device according to claim 3, wherein said supporting plate is a glass reinforced BT resin plate.
Claim 6
Dependent Claim
46 words
A semiconductor device according to claim 3, wherein said grooves are filled with an electrically insulating material selected from the group consisting of BT resin, a polyimide resin and glass having a low melting temperature and wherein said active elements are electrically interconnected by aluminum layers.
Claim 7
Dependent Claim
17 words
A semiconductor device according to claim 3, wherein said silicon substrate is about 0.3 mm in thickness.
Claim 8
Dependent Claim
19 words
A semiconductor device according to claim 6, wherein at least one of said active elements in a PNPN device.
Claim 9
Dependent Claim
119 words
A high voltage integrated semiconductor device comprising: a monocrystalline semiconductor substrate having on one surface thereof a plurality of high voltage active elements which are isolated from each other by physically-cut grooves; said elements having bump electrodes; a bismaleimide-triazine (BT) resin supporting plate for preventing mechanical deformation of said substrate and having a heat resistance property; an adhesive layer for attaching said supporting plate to an opposite surface of said substrate and having an electrically insulating property; and another substrate for packaging said substrate and having a plurality of conductive layers on a surface thereof; said bump electrodes being electrically bonded to said conductive layers on the surface of said another substrate; wherein said grooves reach said supporting plate.
Claim 10
Dependent Claim
119 words
A high voltage integrated semiconductor device comprising: a monocrystalline semiconductor substrate having on one surface thereof a plurality of high voltage active elements which are isolated from each other by physically-cut grooves; said elements having bump electrodes; a bismaleimide-triazine (BT) resin supporting plate for preventing mechanical deformation of said substrate and having a heat resistance property; an adhesive layer for attaching said supporting plate to an opposite surface of said substrate and having an electrically insulating property; and another substrate for packaging said substrate and having a plurality of conductive layers on a surface thereof; said bump electrodes being electrically bonded to said conductive layers on the surface of said another substrate; wherein said grooves reach said supporting plate.
Claim 11
Dependent Claim
16 words
A semiconductor device according to claim 8, wherein said monocrystalline semiconductor substrate is a silicon substrate.
Claim 12
Dependent Claim
42 words
A semiconductor device according to claim 9, wherein said adhesive layer is of an insulating material selected from the group consisting of a silicone resin, an epoxy resin and glass and wherein said supporting plate is heat resistant to about 400° C.
Claim 13
Dependent Claim
19 words
A semiconductor device according to claim 10, wherein at least one of said active elements is a PNPN device.
Claim 14
Dependent Claim
94 words
A high voltage integrated semiconductor device comprising: a first silicon substrate having on the surface thereof a plurality of high voltage active elements which are isolated from each other by physically-cut grooves; a second silicon substrate for preventing mechanical deformation of said first silicon substrate; and a semi-cured bismaleimide-triazine (BT) resin plate which is sandwitched between an opposite surface of said first silicon substrate and said one surface of said first second silicon substrate by melting a surface of said BT resin plate by a thermocompression; wherein said grooves reach said BT resin plate.
Claim 15
Dependent Claim
94 words
A high voltage integrated semiconductor device comprising: a first silicon substrate having on the surface thereof a plurality of high voltage active elements which are isolated from each other by physically-cut grooves; a second silicon substrate for preventing mechanical deformation of said first silicon substrate; and a semi-cured bismaleimide-triazine (BT) resin plate which is sandwitched between an opposite surface of said first silicon substrate and said one surface of said first second silicon substrate by melting a surface of said BT resin plate by a thermocompression; wherein said grooves reach said BT resin plate.
Claim 16
Dependent Claim
19 words
A semiconductor device according to claim 12, wherein at least one of said active elements is a PNPN device.
Claim 17
Dependent Claim
18 words
A semiconductor device according to claim 12, wherein said BT resin plate is reinforced with a glass material.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-07-15 | 1989-01-14 | 1989-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-07-15 | 1993-01-14 | 1993-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-07-15 | 1997-01-14 | 1997-07-16 | $7700.00 | Window Closed / Lapsed |