High density semiconductor memory array and method of making same

Claim 1

A semiconductor device, comprising: an insulating substrate; a first semiconductor region of a first conductive type formed on said insulating substrate and comprising a conductive bit line; A second semiconductor region of the first conductive type formed on said insulating substrate and operatively connected to a power supply; a third semiconductor region of a second and opposite conductive type formed on said insulating substrate and situated between said first and second semiconductor regions; an insulating layer formed on said first, second and third semiconductor regions, said insulating layer having first and second thicknesses, said second thickness being thinner than said first thickness, said first thickness being associated with said first and second semiconductor regions, and said second thickness being associated with said third semiconductor region; and metal wiring comprising a word line formed on said insulating layer, said first and second semiconductor regions being aligned in parallel with each other, said metal wiring being aligned perpendicular to the direction in which said first and second semiconductor regions are aligned and said third semiconductor region being positioned directly under only said metal wiring, thereby providing self-aligned holes adjacent laterally to said third semiconductor region in a direction perpendicular to said metal wiring.