Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
238 words
A threshold circuit comprising: (a) a shift memory including k first elements, at least one center element, and k last elements, for receiving radar video data; (b) first and second adder circuits electrically-connected to the shift memory for producing, from the data in the k first elements and in the k last elements, signals representing first and second sums, respectively; (c) a selection circuit electrically-connected to the first and second adder circuits for passing the signal representing the larger of the first and second sums, said larger sum representing a first threshold value for the data in the at least one center element of the shift memory; (d) a noise level detector electrically-connected to the selection circuit for producing an output signal representing a second threshold value for the data in the at least one center element of the shift memory; (e) a comparator electrically-connected to the selection circuit and to the noise level detector for determining the greater of the threshold values; (f) switching means electrically-controlled by the comparator for passing a signal representing the greater of the two threshold values; and (g) a gate circuit electrically-connected to the shift memory for decreasing the value of data from said shift memory by the second threshold value, and for passing the decreased value if the respective data from the shift memory has a value greater than the threshold value represented by the signal passed by the switching means.
Claim 2
Dependent Claim
238 words
A threshold circuit comprising: (a) a shift memory including k first elements, at least one center element, and k last elements, for receiving radar video data; (b) first and second adder circuits electrically-connected to the shift memory for producing, from the data in the k first elements and in the k last elements, signals representing first and second sums, respectively; (c) a selection circuit electrically-connected to the first and second adder circuits for passing the signal representing the larger of the first and second sums, said larger sum representing a first threshold value for the data in the at least one center element of the shift memory; (d) a noise level detector electrically-connected to the selection circuit for producing an output signal representing a second threshold value for the data in the at least one center element of the shift memory; (e) a comparator electrically-connected to the selection circuit and to the noise level detector for determining the greater of the threshold values; (f) switching means electrically-controlled by the comparator for passing a signal representing the greater of the two threshold values; and (g) a gate circuit electrically-connected to the shift memory for decreasing the value of data from said shift memory by the second threshold value, and for passing the decreased value if the respective data from the shift memory has a value greater than the threshold value represented by the signal passed by the switching means.
Claim 3
Dependent Claim
48 words
A threshold circuit as in claim 1, characterized in that the noise level detector comprises: (a) a minimum value detector for determining, for each azimuth scan, the minimum value of the signal from the selection circuit; and (b) a low-pass filter connected to the minimum value detector output.
Claim 4
Dependent Claim
71 words
A threshold circuit as in claim 1 or 2 for use with a pulse radar apparatus having a n-point FFT processing unit, characterized in that the shift memory comprises n submemories, each having at least 2k+1 elements, for receiving video data from n frequency output channels of the FFT processing unit, and means for successively applying the radar video data from the submemories to the adder circuits and the gate circuit.