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US4527159A Expired / Lapsed US ⏱️ 0.0 years remaining

Threshold circuit for radar video data

Assignee: Thales Nederland BV
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Filing: 1981-11-23
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Granted: 1985-07-02
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Expires: 2001-11-23
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Abstract

Abstract A threshold circuit comprises a shift memory (1) supplied with sampled and digitized radar video data; two adder circuits (2, 3) connected to the first and the last elements of the shift memory (1); and a selection circuit (5) for passing the greater of the two output signals from the adder circuits (2, 3). The output signal of the selection circuit (5) represents a first threshold value for the radar video data from the center element of the shift memory (1). The threshold circuit further comprises a noise level detector (6) connected to the selection circuit (4). The output signal of noise level detector (6) represents a second threshold value for the radar data from the center element of the shift memory (1). A comparator (10) and a gate circuit (13) are used to obtain the radar video data from the shift memory (1), when the amplitude of the video data is in excess of the greater threshold value.

Inventors

  • 👤 Jan Bergman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 18:28
CPC Classifications
G; G01; G01S; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/292; G01S7/2923; G01S7/2927; G01S13/00; G01S13/02; G01S13/50; G01S13/52; G01S13/522; G01S13/524; G01S13/53; G01S13/532; G01S7/2921; G01S7/2922

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 238 words
A threshold circuit comprising: (a) a shift memory including k first elements, at least one center element, and k last elements, for receiving radar video data; (b) first and second adder circuits electrically-connected to the shift memory for producing, from the data in the k first elements and in the k last elements, signals representing first and second sums, respectively; (c) a selection circuit electrically-connected to the first and second adder circuits for passing the signal representing the larger of the first and second sums, said larger sum representing a first threshold value for the data in the at least one center element of the shift memory; (d) a noise level detector electrically-connected to the selection circuit for producing an output signal representing a second threshold value for the data in the at least one center element of the shift memory; (e) a comparator electrically-connected to the selection circuit and to the noise level detector for determining the greater of the threshold values; (f) switching means electrically-controlled by the comparator for passing a signal representing the greater of the two threshold values; and (g) a gate circuit electrically-connected to the shift memory for decreasing the value of data from said shift memory by the second threshold value, and for passing the decreased value if the respective data from the shift memory has a value greater than the threshold value represented by the signal passed by the switching means.
Claim 2
Dependent Claim 238 words
A threshold circuit comprising: (a) a shift memory including k first elements, at least one center element, and k last elements, for receiving radar video data; (b) first and second adder circuits electrically-connected to the shift memory for producing, from the data in the k first elements and in the k last elements, signals representing first and second sums, respectively; (c) a selection circuit electrically-connected to the first and second adder circuits for passing the signal representing the larger of the first and second sums, said larger sum representing a first threshold value for the data in the at least one center element of the shift memory; (d) a noise level detector electrically-connected to the selection circuit for producing an output signal representing a second threshold value for the data in the at least one center element of the shift memory; (e) a comparator electrically-connected to the selection circuit and to the noise level detector for determining the greater of the threshold values; (f) switching means electrically-controlled by the comparator for passing a signal representing the greater of the two threshold values; and (g) a gate circuit electrically-connected to the shift memory for decreasing the value of data from said shift memory by the second threshold value, and for passing the decreased value if the respective data from the shift memory has a value greater than the threshold value represented by the signal passed by the switching means.
Claim 3
Dependent Claim 48 words
A threshold circuit as in claim 1, characterized in that the noise level detector comprises: (a) a minimum value detector for determining, for each azimuth scan, the minimum value of the signal from the selection circuit; and (b) a low-pass filter connected to the minimum value detector output.
Claim 4
Dependent Claim 71 words
A threshold circuit as in claim 1 or 2 for use with a pulse radar apparatus having a n-point FFT processing unit, characterized in that the shift memory comprises n submemories, each having at least 2k+1 elements, for receiving video data from n frequency output channels of the FFT processing unit, and means for successively applying the radar video data from the submemories to the adder circuits and the gate circuit.

References Cited (Backward Citations)

US3701149A Cited
US3778825A Cited
US3995270A Cited
US4213127A Cited
US4266279A Cited
US4249177A Cited
US4386353A Cited
EP0062519A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-07-01 1988-12-31 1989-07-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-07-01 1992-12-31 1993-07-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-07-01 1996-12-31 1997-07-02 $7700.00 Window Closed / Lapsed

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