US4527148A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analog-digital converter
Assignee: Hitachi Ltd
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Filing: 1982-10-28
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Granted: 1985-07-02
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Expires: 2002-10-28
Abstract
Abstract An A/D converter used with an A/D conversion system in which each of input analog signals applied thereto is amplified at a gain selected depending or the level of said each signal and subjected to A/D conversion. The A/D converter is arranged to select a desired one of predetermined gain select modes concerned with the selection of gain of the amplifier. Further, the A/D converter produces a reference analog signal of a level corresponding to the selected gain select mode and compares the input analog signal with the reference analog signal, thereby determining whether or not the gain of the amplifier is to be changed.
Inventors
- 👤 Shigeo Kuboki
- 👤 Kazuo Kato
- 👤 Nobuaki Miyakawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 04:54
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/18; H03M1/181; H03M1/183; H03M1/1205; H03M1/121; H03M1/1215; H03M1/34; H03M1/38; H03M1/46; H03M1/66; H03M1/74; H03M1/76
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
384 words
An apparatus for converting an analog signal into a digital signal in a selected gain mode and adapted to be arranged in the form of a single chip LSI, said apparatus comprising: first terminal means for receiving an analog signal; second terminal means for connecting an external variable gain amplifier so as to amplify said received analog signal, the gain of said amplifier being variable according to a gain select signal applied thereto; a register for storing data for determining the gain mode of said variable gain amplifier, said data being settable according to a command externally applied thereof; a successive approximation A/D converter disposed to receive an analog signal amplified by said amplifier, said converter being operative to convert said amplified signal into a digital signal whose digits are determined successively from a digit of highest order to a digit of lowest order by successive comparison of said amplified analog signal with different levels of reference signals; a mode control gate means coupled to an output of said successive approximation A/D converter and responsive to a determination by said A/D converter of the values of a predetermined number of higher order digits of the digital signal obtained during the operation of A/D conversion of the amplified analog signal by said A/D converter, said predetermined number being determined according to the mode set by said data stored in said register for producing a first signal indicative of whether the gain of said amplifier is to be changed or not depending on said determined values of the higher order digits; third terminal means for coupling said first signal externally of said apparatus so that said first signal is supplied, as said gain select signal, to said amplifier connected to said first terminal means; and said mode control gate means further producing a second signal which causes said A/D converter to continue its operation of A/D conversion of said amplified analog signal when the gain of said amplifier is not to be changed and to stop its operation of A/D conversion of said amplified analog signal when the gain of said amplifier is to be changed and again start its operation to effect the A/D conversion on the newly amplified analog signal after the gain of said amplifier has been changed according to said first signal.
Claim 2
Independent Claim
384 words
An apparatus for converting an analog signal into a digital signal in a selected gain mode and adapted to be arranged in the form of a single chip LSI, said apparatus comprising: first terminal means for receiving an analog signal; second terminal means for connecting an external variable gain amplifier so as to amplify said received analog signal, the gain of said amplifier being variable according to a gain select signal applied thereto; a register for storing data for determining the gain mode of said variable gain amplifier, said data being settable according to a command externally applied thereof; a successive approximation A/D converter disposed to receive an analog signal amplified by said amplifier, said converter being operative to convert said amplified signal into a digital signal whose digits are determined successively from a digit of highest order to a digit of lowest order by successive comparison of said amplified analog signal with different levels of reference signals; a mode control gate means coupled to an output of said successive approximation A/D converter and responsive to a determination by said A/D converter of the values of a predetermined number of higher order digits of the digital signal obtained during the operation of A/D conversion of the amplified analog signal by said A/D converter, said predetermined number being determined according to the mode set by said data stored in said register for producing a first signal indicative of whether the gain of said amplifier is to be changed or not depending on said determined values of the higher order digits; third terminal means for coupling said first signal externally of said apparatus so that said first signal is supplied, as said gain select signal, to said amplifier connected to said first terminal means; and said mode control gate means further producing a second signal which causes said A/D converter to continue its operation of A/D conversion of said amplified analog signal when the gain of said amplifier is not to be changed and to stop its operation of A/D conversion of said amplified analog signal when the gain of said amplifier is to be changed and again start its operation to effect the A/D conversion on the newly amplified analog signal after the gain of said amplifier has been changed according to said first signal.
Claim 3
Dependent Claim
136 words
An apparatus according to claim 1, wherein said successive approximation A/D converter comprises: a successive approximation register having digit positions for storing the values of digits representing the digital signal obtained by A/D conversion of said analog signal; means for placing a predetermined value into said digit positions of said successive approximation register, successively, from the digit for the highest order to that for the lowest order; means for successively producing reference analog signals corresponding to the respective contents of said successive approximation register after said predetermined value has been placed into the respective digit positions of said successive approximation A/D converter; and means for successively comparing the applied analog signal with the respective reference analog signals thereby successively determining the values to be stored in said digit positions depending on the result of said comparison.
Claim 4
Dependent Claim
36 words
An apparatus according to claim 1, further comprising a weighting bit register coupled to the output of said A/D converter for providing weighting bits for the A/D converter output in accordance with the selected gain mode.
Claim 5
Dependent Claim
33 words
An apparatus according to claim 3, wherein said weighting bit register is normally reset and set to a predetermined code representing the selected gain mode when the gain of said amplifier is changed.
Claim 6
Dependent Claim
39 words
An apparatus according to claim 1, wherein the selected gain modes include a normal gain mode for operating said amplifier at a gain of "1" and a double gain mode for operating said amplifier at a gain of "2".
Claim 7
Dependent Claim
39 words
An apparatus according to claim 1, wherein the selected gain modes include a normal gain mode for operating said amplifier at a gain of "1" and a quadruple gain mode for operating said amplifier at a gain of "4".
Claim 8
Dependent Claim
20 words
An apparatus according to claim 1, further comprising means for initially setting said gain mode at said normal gain value.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-07-01 | 1988-12-31 | 1989-07-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-07-01 | 1992-12-31 | 1993-07-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-07-01 | 1996-12-31 | 1997-07-02 | $7700.00 | Window Closed / Lapsed |