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Patent US4525675A successfully refreshed from Google Patents.
US4525675A
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Ultra linear frequency discriminator circuitry
Assignee: Motorola Solutions Inc
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Filing: 1983-04-07
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Granted: 1985-06-25
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Expires: 2003-04-07
Abstract
Abstract Signals to be discriminated are supplied through a controllable attenuator and power splitter to first and second discriminators with response slopes which are equal and of opposite sign. The outputs of the discriminators are summed and a reference signal is subtracted from the sum to produce a control signal which adjusts the input attenuator to maintain the amplitude of the input signal constant. The outputs of the discriminators are also subtracted to provide an output signal which is a linear function of frequency and independent of input amplitude.
Inventors
- 👤 Carl T. Richmond
- 👤 Thomas A. Butler
- 👤 Joseph E. Andrews, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 08:14
CPC Classifications
H; H03; H03D; H03D3/00
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
224 words
Ultra linear frequency discriminator circuitry comprising: controllable attenuation means having a signal input, with varying frequency and amplitude a control input and an output, for providing different amounts of attenuation to signals applied to the signal input thereof in response to control signals applied to the control input thereof; first and second discriminator circuits each having a linear response over a predetermined band of frequencies and with response slopes which are equal and of opposite sign; a power splitter coupling each of said first and second discriminator circuits to the output of said controllable attenuation means; signal combining means connected to receive output signals from said first and second discriminator circuits for combining the output signals to provide a discriminator circuitry output signal which is a linear function of the frequency of signals applied to the signal input of said controllable attenuation means; and control signal generating means connected to receive the output signals from said first and second discriminator circuits and having an output connected to the control input of said controllable attenuation means for generating a control signal that maintains amplitudes of signals supplied to said power splitter from said controllable attenuation means constant whereby the discriminator circuitry output signal from said signal combining means is independent of the amplitude of signals applied to the signal input of said controllable attenuation means.
Claim 2
Dependent Claim
224 words
Ultra linear frequency discriminator circuitry comprising: controllable attenuation means having a signal input, with varying frequency and amplitude a control input and an output, for providing different amounts of attenuation to signals applied to the signal input thereof in response to control signals applied to the control input thereof; first and second discriminator circuits each having a linear response over a predetermined band of frequencies and with response slopes which are equal and of opposite sign; a power splitter coupling each of said first and second discriminator circuits to the output of said controllable attenuation means; signal combining means connected to receive output signals from said first and second discriminator circuits for combining the output signals to provide a discriminator circuitry output signal which is a linear function of the frequency of signals applied to the signal input of said controllable attenuation means; and control signal generating means connected to receive the output signals from said first and second discriminator circuits and having an output connected to the control input of said controllable attenuation means for generating a control signal that maintains amplitudes of signals supplied to said power splitter from said controllable attenuation means constant whereby the discriminator circuitry output signal from said signal combining means is independent of the amplitude of signals applied to the signal input of said controllable attenuation means.
Claim 3
Dependent Claim
64 words
Ultra linear frequency discriminator circuitry as claimed in claim 1 wherein the control signal generating means includes: signal combining means connected to receive the output signals from said first and second discriminator circuits for summing the output signals to provide a control signal, and means for connecting the control signal of said signal combining means to the control input of said controllable attenuation means.
Claim 4
Dependent Claim
46 words
Ultra linear frequency discriminator circuitry as claimed in claim 2 wherein the signal combining means includes an input for a reference voltage source, the reference voltage being equal and opposite in polarity to the sum of the output signals from said first and second discriminator circuits.
Claim 5
Dependent Claim
21 words
Ultra linear frequency discriminator circuitry as claimed in claim 2 wherein the means for connecting the control signals includes an integrator.
Claim 6
Dependent Claim
24 words
Ultra linear frequency discriminator circuitry as claimed in claim 1 wherein the first discriminator circuit includes a high pass filter and an amplitude detector.
Claim 7
Dependent Claim
24 words
Ultra linear frequency discriminator circuitry as claimed in claim 5 wherein the second discriminator circuit includes a low pass filter and an amplitude detector.
Claim 8
Dependent Claim
24 words
Ultra linear frequency discriminator circuitry as claimed in claim 6 wherein the low pass and high pass filters include an equal number of poles.
Claim 9
Dependent Claim
54 words
Ultra linear frequency discriminator circuitry as claimed in claim 6 wherein the high pass filter includes an open transmission line stub effectively shorter than one-half wavelength at a center frequency of interest and the low pass filter includes a shorted transmission line stub effectively shorter than one-half wavelength at the center frequency of interest.
Claim 10
Dependent Claim
19 words
Ultra linear frequency discriminator circuitry as claimed in claim 8 wherein the amplitude detectors each include a semiconductor diode.
Claim 11
Independent Claim
137 words
A method of frequency discrimination substantially independent of the amplitude of input signals comprising the steps of: splitting an input signal into two signals equal in power; high pass filtering and amplitude detecting one of the two signals to produce an output signal defined by V.sub.1 =m(ω-ω.sub.o)+b.sub.1 where m=filter sensitivity ω o =center frequency of interest b=offset amplitude ω=input frequency low pass filtering and amplitude detecting the other of the two signals to produce an output signal defined by V.sub.2 =-m(ω-ω.sub.o)+b.sub.2 subtracting the two output signals to obtain a frequency discriminated output signal defined by V.sub.out =2m(ω-ω.sub.o)+b.sub.1 -b.sub.2 combining the two output signals with a reference voltage, V ref , to produce a control signal defined by V.sub.s =b.sub.1 +b.sub.2 -V.sub.ref controlling the amplitude of the input signal prior to splitting so that V s is zero.
Claim 12
Independent Claim
137 words
A method of frequency discrimination substantially independent of the amplitude of input signals comprising the steps of: splitting an input signal into two signals equal in power; high pass filtering and amplitude detecting one of the two signals to produce an output signal defined by V.sub.1 =m(ω-ω.sub.o)+b.sub.1 where m=filter sensitivity ω o =center frequency of interest b=offset amplitude ω=input frequency low pass filtering and amplitude detecting the other of the two signals to produce an output signal defined by V.sub.2 =-m(ω-ω.sub.o)+b.sub.2 subtracting the two output signals to obtain a frequency discriminated output signal defined by V.sub.out =2m(ω-ω.sub.o)+b.sub.1 -b.sub.2 combining the two output signals with a reference voltage, V ref , to produce a control signal defined by V.sub.s =b.sub.1 +b.sub.2 -V.sub.ref controlling the amplitude of the input signal prior to splitting so that V s is zero.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-06-24 | 1988-12-24 | 1989-06-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-06-24 | 1992-12-24 | 1993-06-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-06-24 | 1996-12-24 | 1997-06-25 | $7700.00 | Window Closed / Lapsed |