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US4521704A
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US
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Differential amplifying circuit
Assignee: Mitsubishi Electric Corp
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Filing: 1983-01-31
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Granted: 1985-06-04
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Expires: 2003-01-31
Abstract
Abstract A differential amplifying circuit includes a pair of main amplifying circuits (5a, 5b) each having at least three input terminals and at least one output terminal, and a pair of auxiliary amplifying circuits (6a, 6b) each having at least one input terminal. Complimentary inputs (D1, D1) are connected to the input terminals of said pair of auxiliary amplifying circuits (6a, 6b), the outputs (D2, D2) of the main amplifying circuits (5a, 5b) are connected as crossing feedback inputs to at least a pair of input terminals of said pair of main amplifying circuits (5a, 5b), the complimentary inputs (D2, D2) are also connected to the other at least one pair of input terminals, and the outputs of said auxiliary amplifying circuits (6a, 6b) are further connected to the further at least pair of input terminals.
Inventors
- 👤 Hirofumi Shinohara
- 👤 Osamu Tomisawa
- 👤 Kenji Anami
- 👤 Masahiko Yoshimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 11:11
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/26; H03F3/265; H03F3/45; H03F3/45071; H03F3/45076; H03F2203/00; H03F2203/45; H03F2203/45318; H03F2203/45394
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
146 words
A differntial amplifying circuit including a pair of main amplifying circuits each having at least three input terminals and at least one output terminal, and a pair of auxiliary amplifying circuits each having at least one amplifying input terminal and at least one output terminal, characterzed in that complementary inputs are connected respectively to the amplifying input terminals of said pair of auxiliary amplifying circuits, the outputs of the main amplifying circuits are connected respectively as crossing feedback inputs to at least another pair of amplifying input terminals of said pair of main amplifying circuits, the complementary inputs are also connected respectively to another at least one pair of amplifying input terminals of said pair of main amplifying circuits, and the output terminals of said auxiliary amplifying circuits are connected to a further at least one pair of amplifying input terminals of said main amplifying circuits.
Claim 2
Dependent Claim
146 words
A differntial amplifying circuit including a pair of main amplifying circuits each having at least three input terminals and at least one output terminal, and a pair of auxiliary amplifying circuits each having at least one amplifying input terminal and at least one output terminal, characterzed in that complementary inputs are connected respectively to the amplifying input terminals of said pair of auxiliary amplifying circuits, the outputs of the main amplifying circuits are connected respectively as crossing feedback inputs to at least another pair of amplifying input terminals of said pair of main amplifying circuits, the complementary inputs are also connected respectively to another at least one pair of amplifying input terminals of said pair of main amplifying circuits, and the output terminals of said auxiliary amplifying circuits are connected to a further at least one pair of amplifying input terminals of said main amplifying circuits.
Claim 3
Dependent Claim
49 words
A differential amplifying circuit recited in claim 1, wherein said main amplifying circuits are each comprised of a series connection of at least three MOS transistors, a gate terminal of each transistor forming one of said input terminals and at least one source/drain junction portion forming said output terminal.
Claim 4
Dependent Claim
49 words
A differential amplifying circuit as recited in claim 2, wherein said auxiliary amplifying circuits are each comprised of a series connection of at least two MOS transistors, the gate of a respective one of said transistors comprising a respective amplifying input terminal of each of said auxiliary amplifying circuits.
Claim 5
Dependent Claim
27 words
A differential amplifying circuit as recited in claim 3, wherein one of said series connected transistors of each of said main amplifying circuits compries a load transistor,
Claim 6
Dependent Claim
21 words
the gate terminal of said load transistor connected for receiving an output from said output terminal of said auxiliary amplifying circuit.
Claim 7
Dependent Claim
21 words
the gate terminal of said load transistor connected for receiving an output from said output terminal of said auxiliary amplifying circuit.
Claim 8
Dependent Claim
46 words
A differential amplifying circuit as recited in claim 3 wherein each of said auxiliary amplifying circuits further comprises a series connected control transistor having an input terminal, and wherein a pair of clock signal terminals are respectively connected to said input terminals of said control transistors.
Claim 9
Dependent Claim
23 words
A differential amplifying circuit recited in claim 1, wherein said auxiliary amplifying circuits each comprise at least one stage of an inverter circuit.
References Cited (Backward Citations)
JPS5398762A
Cited
JPS5752668A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-06-03 | 1988-12-03 | 1989-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-06-03 | 1992-12-03 | 1993-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-06-03 | 1996-12-03 | 1997-06-04 | $7700.00 | Window Closed / Lapsed |