US4519080A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analog threshold decoder
Assignee: Comsat Corp
•
Filing: 1982-10-29
•
Granted: 1985-05-21
•
Expires: 2002-10-29
Abstract
Abstract A modified Type I decoder generates analog syndrome bits from a selected combination of analog signals representing bits yet to be decoded and digital signals representing already decoded information bits. A selected combination of analog syndrome bits is used to generate a weighted majority decision by analog summation. The weighted majority decision is compared to a variable threshold signal which is proportional to the analog magnitude of the bit being decoded. The decision signal which results from this comparison is used to correct the digital value of the bit being decoded. The required number of analog multipliers is reduced by coupling a plurality of multipliers in series and storing the outputs from different analog multipliers in respective analog storage devices.
Inventors
- 👤 John S. Snyder, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 09:09
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/37; H03M13/43
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
263 words
A threshold decoder of the type wherein a sequence of information and parity signals are received, wherein said information signals are hard-detected and each information signal is then decoded in accordance with a decision signal to obtain a respective digital decoded information signal, said decoder comprising: first digital storage means for storing a sequence of first digital signals resulting from hard-detection of said received information signals, said first digital signals representing information signals yet to be decoded including an information signal currently being decoded; second digital storage means for storing a sequence of digital decoded information signals; means responsive to said received information signals for providing analog values representing the value and reliability of said received information signals represented in said first digital storage means; means responsive to said received parity signals for providing analog values representing said received parity signals; first analog storage means for storing said analog values representing the value and reliability of said received information signals represented in said first digital storage means and for storing said analog values representing received parity signals; syndrome means for generating syndrome analog signals from combinations of signals of said first analog storage means and said second digital storage means; decision means for combining a plurality of decision input signals and for generating a decision signal in accordance with the combination of said plurality of decision input signals, said decision input signals including a plurality of said syndrome signals; and decoding means responsive to said generated decision signal for decoding said information signal currently being decoded to provide a digital decoded information signal.
Claim 2
Dependent Claim
263 words
A threshold decoder of the type wherein a sequence of information and parity signals are received, wherein said information signals are hard-detected and each information signal is then decoded in accordance with a decision signal to obtain a respective digital decoded information signal, said decoder comprising: first digital storage means for storing a sequence of first digital signals resulting from hard-detection of said received information signals, said first digital signals representing information signals yet to be decoded including an information signal currently being decoded; second digital storage means for storing a sequence of digital decoded information signals; means responsive to said received information signals for providing analog values representing the value and reliability of said received information signals represented in said first digital storage means; means responsive to said received parity signals for providing analog values representing said received parity signals; first analog storage means for storing said analog values representing the value and reliability of said received information signals represented in said first digital storage means and for storing said analog values representing received parity signals; syndrome means for generating syndrome analog signals from combinations of signals of said first analog storage means and said second digital storage means; decision means for combining a plurality of decision input signals and for generating a decision signal in accordance with the combination of said plurality of decision input signals, said decision input signals including a plurality of said syndrome signals; and decoding means responsive to said generated decision signal for decoding said information signal currently being decoded to provide a digital decoded information signal.
Claim 3
Dependent Claim
29 words
A threshold decoder as defined in claim 1, wherein said syndrome means comprises analog multiplication means receiving and combining outputs from selected stages of said first analog storage means.
Claim 4
Dependent Claim
25 words
A threshold decoder as defined in claim 2, wherein said syndrome means further comprises second analog storage means for storing outputs from said multiplication means.
Claim 5
Dependent Claim
32 words
A threshold decoder as defined in claim 3, wherein said analog multiplication means includes a first multiplier for receiving and multiplying at least first and second signals from said analog storage means.
Claim 6
Dependent Claim
28 words
A threshold decoder as defined in claim 4, further including inverting means coupled at least between the output of said first multiplier and said second analog storage means.
Claim 7
Dependent Claim
41 words
A threshold decoder as defined in claim 4, wherein said analog multiplication means further includes a second analog multiplier for multiplying the output of said first analog multiplier by at least a third selected signal from said first analog storage means.
Claim 8
Dependent Claim
41 words
A threshold decoder as defined in claim 5, wherein said analog multiplication means further includes a second analog multiplier for multiplying the output of said first analog multiplier by at least a third selected signal from said first analog storage means.
Claim 9
Dependent Claim
40 words
A threshold decoder as defined in claim 6, wherein said analog multiplication means further includes a third analog multiplier for multiplying the output of said second multiplier by at least a fourth selected signal from said first analog storage means.
Claim 10
Dependent Claim
29 words
A threshold decoder as defined in claim 8, wherein said inverting means is provided between every other multiplier in said analog multiplication means and said second analog storage means.
Claim 11
Dependent Claim
78 words
A threshold decoder as defined in claim 3, wherein said syndrome means further includes a plurality of controllable inverters for selectively inverting analog signals from said first and second analog storage means in accordance with respective control signals, the outputs from said controllable inverters comprising said syndrome signals, said syndrome means further comprising control means for generating said control signals in accordance with at least a plurality of said decoded information signals in said second digital storage means.
Claim 12
Dependent Claim
77 words
A threshold decoder as defined in claim 10, wherein said control means comprises a plurality of modulo-2 adders each receiving as one input a digital signal from said first digital storage means representing said information signal currently being decoded and each receiving as a second input a signal derived from at least one of said decoded information signals, the outputs of said modulo-2 adders being provided as said control signals to respective ones of said controllable inverters.
Claim 13
Dependent Claim
35 words
A threshold decoder as defined in claim 10, wherein one of said controllable inverters receives as its control signal said digital signal from said first digital storage means representing said information signal currently being decoded.
Claim 14
Dependent Claim
38 words
A threshold decoder as defined in claim 1, wherein said decision means comprises a summation means for combining said decision input signals and a comparison means for generating said decision signal from the output of said summation means.
Claim 15
Dependent Claim
29 words
A threshold decoder as defined in claim 1, wherein one of said decision input signals comprises an analog signal representing the reliability of said information signal currently being decoded.
Claim 16
Dependent Claim
130 words
A threshold decoder of the type wherein sequences of information and parity signals are received and wherein selected received signals are combined in combining means to calculate new parity signals which are used in subsequent decoding of said received information signals, said combining means comprising a first analog multiplier for multiplying at least first and second ones of said received signals to generate a first new parity signal, first analog storage means for storing a sequence of outputs from said multiplier and a second analog multiplier for multiplying said first new parity signal with at least a third one of said received signals to generate a second new parity signal, said decoder further including second analog storage means for receiving and storing a sequence of outputs from said second multiplier.
Claim 17
Dependent Claim
130 words
A threshold decoder of the type wherein sequences of information and parity signals are received and wherein selected received signals are combined in combining means to calculate new parity signals which are used in subsequent decoding of said received information signals, said combining means comprising a first analog multiplier for multiplying at least first and second ones of said received signals to generate a first new parity signal, first analog storage means for storing a sequence of outputs from said multiplier and a second analog multiplier for multiplying said first new parity signal with at least a third one of said received signals to generate a second new parity signal, said decoder further including second analog storage means for receiving and storing a sequence of outputs from said second multiplier.
Claim 18
Dependent Claim
62 words
A threshold decoder as defined in claim 5, wherein said combining means further includes a third analog multiplier for multiplying said second new parity signal with at least a fourth one of said received signals to generate a third new parity signal, said decoder further including third analog storage means for receiving and storing a sequence of outputs from said third multiplier.
Claim 19
Dependent Claim
34 words
A threshold decoder as defined in claim 16, further including inversion means for inverting the output of any one of said first through third multipliers which involves an even number of said received signals.
Claim 20
Dependent Claim
72 words
A threshold decoder as defined in claim 15, further including means for generating syndrome bits from said first through third analog storage means, means for generating a threshold signal corresponding to the magnitude of a received information signal, decoding means for decoding said received information signal in accordance with a decision signal, and decision means for generating said decision signal in accordance with a combination of said syndrome signals and threshold signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-05-20 | 1988-11-19 | 1989-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-05-20 | 1992-11-19 | 1993-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-05-20 | 1996-11-19 | 1997-05-21 | $7700.00 | Window Closed / Lapsed |