US4322848A
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Reliability-weighted analog threshold decoder
Assignee: International Telecommunications Satellite Organization
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Filing: 1980-06-26
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Granted: 1982-03-30
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Expires: 2000-06-26
Abstract
Abstract Reliability weighting is provided in the input and/or feedback paths of an analog threshold decoder to achieve additional coding gain. Examples of the reliability weighting function for a bipolar signalling system (±A volts), a receive voltage v and Gaussian noise having a variance σ 2 are R=tanh (vA/σ 2 ), R=tanh (1.6 v/A), and a linear transformation having voltage clamps at ±1 volt. In the latter case, the gain of the linear transformation in the feedback weighting function may be n times that of the input weighting function, where n is the number of estimates involves in the output.
Inventors
- 👤 John S. Snyder, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 18:04
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0059
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
124 words
In an analog threshold decoder for decoding majority logic decodable codes having input and parity bit sequences, said decoder having multi-stage analog storage means having at least one input for storing analog voltages supplied to said input, and summation means for providing an analog output derived from the selective combination of a plurality of said stored analog voltages, the improvement comprising: input non-linear reliability weighting means for receiving analog voltages representing bit values in said information and parity bit sequences and, for each received analog voltage, providing to the input of said analog storage means a voltage which is a non-linear function of said received analog voltage and represents both the polarity and reliability of the bit value represented by said received analog voltage.
Claim 2
Dependent Claim
124 words
In an analog threshold decoder for decoding majority logic decodable codes having input and parity bit sequences, said decoder having multi-stage analog storage means having at least one input for storing analog voltages supplied to said input, and summation means for providing an analog output derived from the selective combination of a plurality of said stored analog voltages, the improvement comprising: input non-linear reliability weighting means for receiving analog voltages representing bit values in said information and parity bit sequences and, for each received analog voltage, providing to the input of said analog storage means a voltage which is a non-linear function of said received analog voltage and represents both the polarity and reliability of the bit value represented by said received analog voltage.
Claim 3
Dependent Claim
63 words
An analog threshold decoder as defined in claim 1, wherein said received analog voltages include information analog voltages corresponding to information bits in said code and parity analog voltages representing parity bits in said code, said input non-linear reliability weighting means including information bit non-linear reliability weighting means and parity bit non-linear reliability weighting means, both of which utilize the same non-linear function.
Claim 4
Dependent Claim
63 words
An analog threshold decoder as defined in claim 1, wherein said code employs signalling voltages of +A and -A volts transmitted over a transmission channel having additive Gaussian noise, said non-linear function being defined by: R=tanh(vA/σ.sup.2), where v is the received analog voltage level, σ 2 is the variance of Gaussian noise in said transmission channel and R is said input reliability voltage.
Claim 5
Dependent Claim
41 words
An analog threshold decoder as defined in claim 1, wherein said code employs signalling voltages of ±A volts and said non-linear function is defined by: R=tanh(1.6v/A), where v is the received analog voltage level and R is said input reliability voltage.
Claim 6
Dependent Claim
46 words
An analog threshold decoder as defined in claim 1, wherein said code employs signalling voltages of ±A volts, and said non-linear function is defined by: ##EQU12## where v is the received analog voltage level, R is the input reliability voltage, and m is a gain constant.
Claim 7
Dependent Claim
81 words
An analog threshold decoder as defined in claim 1, wherein said decoder includes feedback means for feeding back to said analog storage means a feedback voltage derived from the output of said summation means, the improvement further comprising: feedback reliability weighting means for receiving the output of said summation means and providing a feedback voltage which is a non-linear function of said summation means output and represents both the polarity and reliability of a bit represented by said summation means output.
Claim 8
Dependent Claim
26 words
An analog threshold decoder as defined in claim 6, wherein said analog storage means includes feedback analog storage means for receiving and storing said feedback voltages.
Claim 9
Dependent Claim
51 words
An analog threshold decoder as defined in claim 6, wherein said feedback means comprises a threshold detector for providing a fixed feedback voltage if one polarity of said summation means output is positive and a fixed feedback voltage of the opposite polarity if the output of said summation means is negative.
Claim 10
Dependent Claim
63 words
An analog threshold decoder as defined in claim 6, wherein said code employs signalling voltages of ±A volts and said non-linear function employed by said feedback reliability weighting means is defined by: ##EQU13## where V f is the output of said summation means, R f is said feedback reliability voltage and n is a feedback gain constant greater than or equal to 1.
Claim 11
Dependent Claim
19 words
An analog threshold decoder as defined in claim 9, wherein the value said feedback gain constant n is 5.
Claim 12
Dependent Claim
22 words
An analog threshold decoder as defined in claim 5, wherein the value of said gain constant m is between 0.5 and 2.0.
Claim 13
Dependent Claim
20 words
An analog threshold decoder as defined in claim 11, wherein the value of said gain constant m is approximately 1.0.
Claim 14
Dependent Claim
75 words
An analog threshold decoder as defined in claim 5, wherein said summation means includes a plurality of analog multipliers each receiving a different set of inputs from said analog storage means and each providing an output representing the value of a particular bit in said code and a summation amplifier receiving and combining the outputs from said plurality of analog multipliers, the output of said summation amplifier representing the decoded value of said particular bit.
Claim 15
Dependent Claim
63 words
An analog threshold decoder as defined in claim 13, wherein said code employes signalling voltages of ±A volts and said non-linear function employed by said feedback reliability weighting means is defined by: ##EQU14## where V f is the output of said summation means, R f is said feedback reliability voltage and n is a constant equal to the number of analog multiplier outputs.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-03-29 | 1985-09-28 | 1986-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-03-29 | 1989-09-28 | 1990-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-03-29 | 1993-09-28 | 1994-03-30 | $7700.00 | Window Closed / Lapsed |