Patent US4518877A successfully refreshed from Google Patents.
US4518877A
Expired / Lapsed
US
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Precision absolute value amplifier for a precision voltmeter
Assignee: United States, ENERGY THE, Department of
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Filing: 1982-10-19
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Granted: 1985-05-21
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Expires: 2002-10-19
Abstract
Abstract Bipolar inputs are afforded by the plus inputs of first and second differential input amplifiers. A first gain determining resister is connected between the minus inputs of the differential amplifiers. First and second diodes are connected between the respective minus inputs and the respective outputs of the differential amplifiers. First and second FETs have their gates connected to the outputs of the amplifiers, while their respective source and drain circuits are connected between the respective minus inputs and an output lead extending to a load resister. The output current through the load resister is proportional to the absolute value of the input voltage difference between the bipolar input terminals. A third differential amplifier has its plus input terminal connected to the load resister. A second gain determining resister is connected between the minus input of the third differential amplifier and a voltage source. A third FET has its gate connected to the output of the third amplifier. The source and drain circuit of the third transistor is connected between the minus input of the third amplifier and a voltage-frequency converter, constituting an output device. A polarity detector is also provided, comprising a pair of transistors having their inputs connected to the outputs of the first and second differential amplifiers. The outputs of the polarity detector are connected to gates which switch the output of the voltage-frequency converter between up and down counting outputs.
Inventors
- 👤 William E. Hearn
- 👤 Donald J. Rondeau
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 14:40
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/0084; G01R19/25; G01R19/252; G06; G06G; G06G7/00; G06G7/12; G06G7/25
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
257 words
An absolute value amplifier for a precision voltmeter or the like, comprising first and second differential input amplifier devices having plus and minus inputs, said plus inputs affording bipolar input terminals for said amplifier, a gain determining resistor connected between said minus inputs of said differential input amplifier devices, first and second diodes connected between the respective minus inputs and the respective outputs of said differential input amplifier devices, an output terminal for said amplifier, first and second transistors having respective output connections connected between the respective minus inputs and said output terminal, said transistors having respective input connections connected to the respective outputs of said amplifier devices, and load means for supplying output current to said output terminal, said output current being proportional to the absolute value of the input voltage between said input terminals, said load means comprising a load resistor connected between said output terminal and a voltage source, said amplifier comprising a third differential amplifier device having a plus input connected said output terminal, said third differential amplifier device having a minus input, a second gain determining resistor connected between said last-mentioned minus input and said voltage source, feedback means connected between the output of said third differential amplifier device and said minus input, and output means connected to the output of said third differential amplifier device, said feedback means comprising a third transistor having output connections between said last-mentioned minus input and said output means, said third transistor having an input connection connected to the output of said third differential amplifier device.
Claim 2
Dependent Claim
257 words
An absolute value amplifier for a precision voltmeter or the like, comprising first and second differential input amplifier devices having plus and minus inputs, said plus inputs affording bipolar input terminals for said amplifier, a gain determining resistor connected between said minus inputs of said differential input amplifier devices, first and second diodes connected between the respective minus inputs and the respective outputs of said differential input amplifier devices, an output terminal for said amplifier, first and second transistors having respective output connections connected between the respective minus inputs and said output terminal, said transistors having respective input connections connected to the respective outputs of said amplifier devices, and load means for supplying output current to said output terminal, said output current being proportional to the absolute value of the input voltage between said input terminals, said load means comprising a load resistor connected between said output terminal and a voltage source, said amplifier comprising a third differential amplifier device having a plus input connected said output terminal, said third differential amplifier device having a minus input, a second gain determining resistor connected between said last-mentioned minus input and said voltage source, feedback means connected between the output of said third differential amplifier device and said minus input, and output means connected to the output of said third differential amplifier device, said feedback means comprising a third transistor having output connections between said last-mentioned minus input and said output means, said third transistor having an input connection connected to the output of said third differential amplifier device.
Claim 3
Dependent Claim
41 words
An amplifier according to claim 1, in which each of said transistors is of the FET type, having said output connections in the form of a source and a drain and having said input connection in the form of a gate.
Claim 4
Dependent Claim
16 words
An amplifier according to claim 1, in which said diodes are of the hot carrier type.
Claim 5
Dependent Claim
21 words
An amplifier according to claim 1, in which said resistor is changeable in resistance to change the gain of said amplifier.
Claim 6
Dependent Claim
54 words
An amplifier according to claim 1, in which said third transistor is in the form of an FET having said output connections in the form of a source and a drain, said last-mentioned FET having said input connection in the form of a gate connected to the output of said third differential amplifier device.
Claim 7
Dependent Claim
23 words
An amplifier according to claim 1, said output means comprising an additional load resistor connected between said third transistor and a voltage source.
Claim 8
Dependent Claim
24 words
An amplifier according to claim 1, in which said second gain determining resistor is changeable in resistance for changing the gain of said amplifier.
Claim 9
Dependent Claim
39 words
An amplifier according to claim 1, including a voltage-to-frequency converter connected to said output means for producing an output signal having a frequency which is proportional to the absolute value of the input voltage between the bipolar input terminals.
Claim 10
Dependent Claim
67 words
An amplifier according to claim 8, including two different output circuits, gating means for switching the output of said converter between said two different output circuits, and polarity responsive means connected between the outputs of said first and second differential amplifier devices and said gating means for switching said gating means in response to changes in the polarity of the input voltage across said bipolar input terminals.
Claim 11
Dependent Claim
44 words
An amplifier according to claim 9, said polarity responsive means comprising a pair of transistors having their inputs connected to the outputs of said first and second differential amplifier devices, and means connecting the outputs of said last mentioned transistors to said gating means.
Claim 12
Dependent Claim
71 words
An amplifier according to claim 1, including power supply floating circuits connected to the power supply inputs of said first and second differential input amplifier devices and affording floating power supplies for said devices, said power supply floating circuits including a pair of operational amplifiers connected as voltage followers and connected between said respective bipolar input terminals and the power supply inputs for said first and second differential input amplifier devices.
References Cited (Backward Citations)
US3736515A
Cited
US3851259A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-05-20 | 1988-11-19 | 1989-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-05-20 | 1992-11-19 | 1993-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-05-20 | 1996-11-19 | 1997-05-21 | $7700.00 | Window Closed / Lapsed |