Patent US4514749A successfully refreshed from Google Patents.
US4514749A
Expired / Lapsed
US
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VLSI Chip with ground shielding
Assignee: Nokia Bell Labs
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Filing: 1983-01-18
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Granted: 1985-04-30
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Expires: 2003-01-18
Abstract
Abstract In VLSI chips, clock pulse skew is increasingly forbidding as one micron technology and operation at 25 megahertz is approached. Skew is avoided by encompassing the clock distribution line in such chips with ground lines to shield the distribution line from capacitive coupling to adjacent control lines. Skew is reduced dramatically.
Inventors
- 👤 Masakazu Shoji
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 05:04
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00346; H03K19/0175; H03K19/017545; H03K5/00; H03K5/125; H03K5/1252; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/427
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
69 words
An integrated circuit chip having a wiring section including at least one clock distribution line and at least a first signal line, said wiring section including first and second lines adjacent to first and second sides of said clock distribution line, each of said first and second lines being adapted to be maintained at a fixed d-c potential for isolating said clock distribution line from said first signal line.
Claim 2
Dependent Claim
69 words
An integrated circuit chip having a wiring section including at least one clock distribution line and at least a first signal line, said wiring section including first and second lines adjacent to first and second sides of said clock distribution line, each of said first and second lines being adapted to be maintained at a fixed d-c potential for isolating said clock distribution line from said first signal line.
Claim 3
Dependent Claim
17 words
An integrated circuit chip in accordance with claim 1 wherein said first line comprises a ground BUS.
Claim 4
Dependent Claim
17 words
An integrated circuit chip in accordance with claim 2 wherein said second line comprises a power BUS.
Claim 5
Dependent Claim
32 words
An integrated circuit chip in accordance with claim 1 wherein the width of said clock distribution line is about equal to the spacings between said line and said first and second lines.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-04-29 | 1988-10-29 | 1989-04-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-04-29 | 1992-10-29 | 1993-04-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-04-29 | 1996-10-29 | 1997-04-30 | $7700.00 | Window Closed / Lapsed |