Patent US4513394A successfully refreshed from Google Patents.
US4513394A
Expired / Lapsed
US
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System for providing a multi-bit input to a computer controlled system
Assignee: RCA Licensing Corp
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Filing: 1982-07-28
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Granted: 1985-04-23
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Expires: 2002-07-28
Abstract
Abstract A system for inputting a multi-bit input to a computer in response to the closing of a single switch includes a multi-line to a single line encoder. A plurality of input switches individually set different input position numbers into the encoder. When the input from a binary counter equals the number, the number is output to the computer.
Inventors
- 👤 Craig E. Deyer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 07:51
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/01; G06F3/02; G06F3/023
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
238 words
A system for providing a multi-bit input to a computer in response to the change of state of one of a plurality of system input lines comprising: input logic means having a plurality of input terminals, a plurality of binary number terminals and at least one output terminal; a plurality of means for changing the state of said input terminals, each of said input terminals being responsive to one of said means for changing state whereby a change of state on one of said input terminals sets and input position number into said logic means; binary input means for providing binary inputs to said binary number terminals whereby said input logic means produces an output on said output terminal when said binary input equals said input position number; clock means for providing clock pulses to said binary input means; bistable logic means arranged between said input logic means and said clock means for receiving said output on said output terminal of said input logic means whereby said bistable logic means controls said clock means, said bistable logic means being responsively coupled to a read-complete signal from said computer; and output logic means responsive to said binary input means and controlled by said bistable logic means for decoding said binary inputs into said input position number whereby said multi-bit input is provided to said computer when via said output logic means said binary input equals said input position number.
Claim 2
Independent Claim
238 words
A system for providing a multi-bit input to a computer in response to the change of state of one of a plurality of system input lines comprising: input logic means having a plurality of input terminals, a plurality of binary number terminals and at least one output terminal; a plurality of means for changing the state of said input terminals, each of said input terminals being responsive to one of said means for changing state whereby a change of state on one of said input terminals sets and input position number into said logic means; binary input means for providing binary inputs to said binary number terminals whereby said input logic means produces an output on said output terminal when said binary input equals said input position number; clock means for providing clock pulses to said binary input means; bistable logic means arranged between said input logic means and said clock means for receiving said output on said output terminal of said input logic means whereby said bistable logic means controls said clock means, said bistable logic means being responsively coupled to a read-complete signal from said computer; and output logic means responsive to said binary input means and controlled by said bistable logic means for decoding said binary inputs into said input position number whereby said multi-bit input is provided to said computer when via said output logic means said binary input equals said input position number.
Claim 3
Dependent Claim
16 words
The system of claim 1 wherein said input logic means is a multi-line to single-line encoder.
Claim 4
Dependent Claim
22 words
The system of claim 2 wherein said bistable logic means includes a D-type flip-flop responsive to said at least one output terminal.
Claim 5
Dependent Claim
25 words
The system of claim 3 wherein said bistable logic means further includes multi-input logic means conjunctively responsive to said output terminal and said clock means.
Claim 6
Dependent Claim
14 words
The system of claim 4 wherein said binary input means includes a binary counter.
Claim 7
Dependent Claim
35 words
The system of claim 3 wherein said clock means is responsive to said flip-flop and wherein said bistable logic means is responsive to said clock means whereby said clock means enables said bistable logic means.
Claim 8
Dependent Claim
20 words
The system of claim 6 wherein said clock means includes at least one logic means having conjunctively responsive multi-input terminals.
Claim 9
Dependent Claim
32 words
The system of claim 3 or 6 wherein said output logic means includes decoder means having a plurality of output terminals at least equal in number to said plurality of input terminals.
Claim 10
Dependent Claim
17 words
The system of claim 8 wherein said decoder means includes at least one three-line to eight-line decoder.
Claim 11
Dependent Claim
19 words
The system of claim 3 or 6 wherein said output logic means includes at least one multi-bit magnitude comparator.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-04-22 | 1988-10-22 | 1989-04-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-04-22 | 1992-10-22 | 1993-04-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-04-22 | 1996-10-22 | 1997-04-23 | $7700.00 | Window Closed / Lapsed |