Patent US4511982A successfully refreshed from Google Patents.
US4511982A
Expired / Lapsed
US
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Numerical control device
Assignee: Fanuc Corp
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Filing: 1981-07-07
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Granted: 1985-04-16
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Expires: 2001-07-07
Abstract
Abstract The present invention relates to a novel numerical control device which enables failures to be diagnosed even when a failure develops in a main processor for executing numerical control as well as failure diagnosis in hardware and the like. The invention includes a bus switching circuit provided in a main bus of an NC device. The NC device also includes a main processor for carrying out numerical control, a main memory, a tape reader, a numerical control panel and position control circuits. Further provided are a service processor for carrying out failure diagnosis and a service memory. When a failure develops in the main processor, the service processor immediately halts the execution of instructions by the main processor, the service processor is then connected to the main bus by the switching action of the bus switching circuit, and the service processor executes failure diagnosis by means of a diagnostic program for diagnosing failures, which program has been previously written into the service memory.
Inventors
- 👤 Mitsuo Kurakake
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:03
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/18; G05B19/406; G05B19/4063; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/273; G06F11/2736; G05B2219/00; G05B2219/30; G05B2219/33; G05B2219/33324
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
213 words
A numerical control device having peripheral circuitry including a main memory, a tape reader, a numerical control panel and position control circuits connected to a main bus, said device comprising: main processor means, operatively connected to the main bus, for carrying out processing for numerical control; switching circuit means, operatively connected to said main processor means and the main bus, for connecting said main processor means to the main bus; service processor means, operatively connected to said main processor means and the main bus via said switching circuit means and which is separate from said main processor means, for halting the execution of instructions by said main processor means and for diagnosing failure of said main processor means and the peripheral circuitry, said service processor means having a numerical control processing capacity substantially equivalent to that of said main processor means with respect to the peripheral circuitry connected to the main bus which is connected to said main processor through said switching circuit means, said switching circuit means for connecting said service processor means to the main bus when said main processor means fails; a service processor bus operatively connected to said service processor means; and a service memory, a control panel and a display device operatively connected to said service processor bus.
Claim 2
Dependent Claim
213 words
A numerical control device having peripheral circuitry including a main memory, a tape reader, a numerical control panel and position control circuits connected to a main bus, said device comprising: main processor means, operatively connected to the main bus, for carrying out processing for numerical control; switching circuit means, operatively connected to said main processor means and the main bus, for connecting said main processor means to the main bus; service processor means, operatively connected to said main processor means and the main bus via said switching circuit means and which is separate from said main processor means, for halting the execution of instructions by said main processor means and for diagnosing failure of said main processor means and the peripheral circuitry, said service processor means having a numerical control processing capacity substantially equivalent to that of said main processor means with respect to the peripheral circuitry connected to the main bus which is connected to said main processor through said switching circuit means, said switching circuit means for connecting said service processor means to the main bus when said main processor means fails; a service processor bus operatively connected to said service processor means; and a service memory, a control panel and a display device operatively connected to said service processor bus.
Claim 3
Dependent Claim
26 words
A numerical control device according to claim 1, wherein said service processor means is a processor within an engineering debugging panel for the numerical control device.
Claim 4
Dependent Claim
114 words
A numerical control system, comprising: a main processor for numerical control processing; a switching circuit operatively connected to said main processor; peripheral circuits operatively connected to said switching circuit and including numerical control circuits and a diagnostic program memory including a first system diagnostic program executable by said main processor; a service processor memory including a second system diagnostic program; and a service processor, operatively connected to said switching circuit and said service processor memory, for diagnosing failure of said main processor and said peripheral circuits when said main processor fails in accordance with the second diagnostic program, said switching circuit connecting said service processor to said peripheral circuits when said main processor fails.
Claim 5
Dependent Claim
114 words
A numerical control system, comprising: a main processor for numerical control processing; a switching circuit operatively connected to said main processor; peripheral circuits operatively connected to said switching circuit and including numerical control circuits and a diagnostic program memory including a first system diagnostic program executable by said main processor; a service processor memory including a second system diagnostic program; and a service processor, operatively connected to said switching circuit and said service processor memory, for diagnosing failure of said main processor and said peripheral circuits when said main processor fails in accordance with the second diagnostic program, said switching circuit connecting said service processor to said peripheral circuits when said main processor fails.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-04-15 | 1988-10-15 | 1989-04-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-04-15 | 1992-10-15 | 1993-04-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-04-15 | 1996-10-15 | 1997-04-16 | $7700.00 | Window Closed / Lapsed |